Added CHANGELOG.md

Author: KushalMeghani1644

riscv/CHANGELOG.md

@@ -9,7 +9,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
+- Added DCSR (Debug Control and Status Register) CSR support for the RISC-V
 - Add `miselect` CSR
+- Improved assembly macro handling in asm.rs
 
 ## [v0.15.0] - 2025-09-08
 
@@ -283,4 +285,4 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [v0.7.0]: https://github.com/rust-embedded/riscv/compare/v0.6.0...v0.7.0
 [v0.6.0]: https://github.com/rust-embedded/riscv/compare/v0.5.6...v0.6.0
 [v0.5.6]: https://github.com/rust-embedded/riscv/compare/v0.5.5...v0.5.6
-[v0.5.5]: https://github.com/rust-embedded/riscv/compare/v0.5.4...v0.5.5
+[v0.5.5]: https://github.com/rust-embedded/riscv/compare/v0.5.4...v0.5.5