Merge #385

385: remove the ptr() function in favor of the PTR constant r=adamgreig a=TDHolmes

Per #370/#235, the const fn ptr() was supposed to be deprecated and subsequently removed. This PR removes it for the master branch tracking the 0.8 release

Co-authored-by: Tyler Holmes <tyler@holmesengineering.com>

Author: bors[bot]

CHANGELOG.md

@@ -21,6 +21,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ### Fixed
 - Fixed `singleton!()` statics sometimes ending up in `.data` instead of `.bss` (#364, #380).
 
+### Removed
+- removed all peripherals `ptr()` functions in favor of the associated constant `PTR` (#385).
+
 ## [v0.7.4] - 2021-12-31
 
 ### Added

panic-itm/CHANGELOG.md

@@ -7,6 +7,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+### Changed
+
+- switched from `ITM::ptr()` to `ITM::PTR` as `ptr()` has been
+  deprecated/removed (#385).
+
 ## [v0.4.2] - 2020-11-14
 
 - Support cortex-m v0.7.0

panic-itm/src/lib.rs

@@ -46,7 +46,7 @@ use cortex_m::peripheral::ITM;
 fn panic(info: &PanicInfo) -> ! {
     interrupt::disable();
 
-    let itm = unsafe { &mut *ITM::ptr() };
+    let itm = unsafe { &mut *ITM::PTR };
     let stim = &mut itm.stim[0];
 
     iprintln!(stim, "{}", info);

src/itm.rs

@@ -128,7 +128,7 @@ pub fn write_all(port: &mut Stim, buffer: &[u8]) {
 ///
 /// ```no_run
 /// # use cortex_m::{itm::{self, Aligned}, peripheral::ITM};
-/// # let port = unsafe { &mut (*ITM::ptr()).stim[0] };
+/// # let port = unsafe { &mut (*ITM::PTR).stim[0] };
 /// let mut buffer = Aligned([0; 14]);
 ///
 /// buffer.0.copy_from_slice(b"Hello, world!\n");

src/peripheral/cpuid.rs

@@ -122,7 +122,7 @@ impl CPUID {
     pub fn cache_dminline() -> u32 {
         const CTR_DMINLINE_POS: u32 = 16;
         const CTR_DMINLINE_MASK: u32 = 0xF << CTR_DMINLINE_POS;
-        let ctr = unsafe { (*Self::ptr()).ctr.read() };
+        let ctr = unsafe { (*Self::PTR).ctr.read() };
         (ctr & CTR_DMINLINE_MASK) >> CTR_DMINLINE_POS
     }
 
@@ -134,7 +134,7 @@ impl CPUID {
     pub fn cache_iminline() -> u32 {
         const CTR_IMINLINE_POS: u32 = 0;
         const CTR_IMINLINE_MASK: u32 = 0xF << CTR_IMINLINE_POS;
-        let ctr = unsafe { (*Self::ptr()).ctr.read() };
+        let ctr = unsafe { (*Self::PTR).ctr.read() };
         (ctr & CTR_IMINLINE_MASK) >> CTR_IMINLINE_POS
     }
 }

src/peripheral/dcb.rs

@@ -74,7 +74,7 @@ impl DCB {
     pub fn is_debugger_attached() -> bool {
         unsafe {
             // do an 8-bit read of the 32-bit DHCSR register, and get the LSB
-            let value = ptr::read_volatile(Self::ptr() as *const u8);
+            let value = ptr::read_volatile(Self::PTR as *const u8);
             value & 0x1 == 1
         }
     }

src/peripheral/dwt.rs

@@ -214,7 +214,7 @@ impl DWT {
     #[inline]
     pub fn cycle_count() -> u32 {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Self::ptr()).cyccnt.read() }
+        unsafe { (*Self::PTR).cyccnt.read() }
     }
 
     /// Set the cycle count
@@ -231,7 +231,7 @@ impl DWT {
     #[inline]
     pub fn unlock() {
         // NOTE(unsafe) atomic write to a stateless, write-only register
-        unsafe { (*Self::ptr()).lar.write(0xC5AC_CE55) }
+        unsafe { (*Self::PTR).lar.write(0xC5AC_CE55) }
     }
 
     /// Get the CPI count
@@ -245,7 +245,7 @@ impl DWT {
     #[inline]
     pub fn cpi_count() -> u8 {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Self::ptr()).cpicnt.read() as u8 }
+        unsafe { (*Self::PTR).cpicnt.read() as u8 }
     }
 
     /// Set the CPI count
@@ -260,7 +260,7 @@ impl DWT {
     #[inline]
     pub fn exception_count() -> u8 {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Self::ptr()).exccnt.read() as u8 }
+        unsafe { (*Self::PTR).exccnt.read() as u8 }
     }
 
     /// Set the exception count
@@ -281,7 +281,7 @@ impl DWT {
     #[inline]
     pub fn sleep_count() -> u8 {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Self::ptr()).sleepcnt.read() as u8 }
+        unsafe { (*Self::PTR).sleepcnt.read() as u8 }
     }
 
     /// Set the sleep count
@@ -296,7 +296,7 @@ impl DWT {
     #[inline]
     pub fn lsu_count() -> u8 {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Self::ptr()).lsucnt.read() as u8 }
+        unsafe { (*Self::PTR).lsucnt.read() as u8 }
     }
 
     /// Set the lsu count
@@ -313,7 +313,7 @@ impl DWT {
     #[inline]
     pub fn fold_count() -> u8 {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Self::ptr()).foldcnt.read() as u8 }
+        unsafe { (*Self::PTR).foldcnt.read() as u8 }
     }
 
     /// Set the folded instruction count

src/peripheral/mod.rs

@@ -50,7 +50,7 @@
 //! } // all the peripheral singletons are destroyed here
 //!
 //! // actually safe because this is an atomic read with no side effects
-//! let cyccnt = unsafe { (*DWT::ptr()).cyccnt.read() };
+//! let cyccnt = unsafe { (*DWT::PTR).cyccnt.read() };
 //! ```
 //!
 //! # References
@@ -244,12 +244,6 @@ unsafe impl Send for AC {}
 impl AC {
     /// Pointer to the register block
     pub const PTR: *const self::ac::RegisterBlock = 0xE000_EF90 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const self::ac::RegisterBlock {
-        Self::PTR
-    }
 }
 
 /// Cache and branch predictor maintenance operations
@@ -271,12 +265,6 @@ impl CBP {
 
     /// Pointer to the register block
     pub const PTR: *const self::cbp::RegisterBlock = 0xE000_EF50 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const self::cbp::RegisterBlock {
-        Self::PTR
-    }
 }
 
 #[cfg(not(armv6m))]
@@ -300,12 +288,6 @@ unsafe impl Send for CPUID {}
 impl CPUID {
     /// Pointer to the register block
     pub const PTR: *const self::cpuid::RegisterBlock = 0xE000_ED00 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const self::cpuid::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for CPUID {
@@ -328,12 +310,6 @@ unsafe impl Send for DCB {}
 impl DCB {
     /// Pointer to the register block
     pub const PTR: *const dcb::RegisterBlock = 0xE000_EDF0 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const dcb::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for DCB {
@@ -356,12 +332,6 @@ unsafe impl Send for DWT {}
 impl DWT {
     /// Pointer to the register block
     pub const PTR: *const dwt::RegisterBlock = 0xE000_1000 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const dwt::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for DWT {
@@ -385,12 +355,6 @@ unsafe impl Send for FPB {}
 impl FPB {
     /// Pointer to the register block
     pub const PTR: *const fpb::RegisterBlock = 0xE000_2000 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const fpb::RegisterBlock {
-        Self::PTR
-    }
 }
 
 #[cfg(not(armv6m))]
@@ -415,12 +379,6 @@ unsafe impl Send for FPU {}
 impl FPU {
     /// Pointer to the register block
     pub const PTR: *const fpu::RegisterBlock = 0xE000_EF30 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const fpu::RegisterBlock {
-        Self::PTR
-    }
 }
 
 #[cfg(any(has_fpu, native))]
@@ -449,12 +407,6 @@ unsafe impl Send for ICB {}
 impl ICB {
     /// Pointer to the register block
     pub const PTR: *mut icb::RegisterBlock = 0xE000_E004 as *mut _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *mut icb::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for ICB {
@@ -485,12 +437,6 @@ unsafe impl Send for ITM {}
 impl ITM {
     /// Pointer to the register block
     pub const PTR: *mut itm::RegisterBlock = 0xE000_0000 as *mut _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *mut itm::RegisterBlock {
-        Self::PTR
-    }
 }
 
 #[cfg(all(not(armv6m), not(armv8m_base)))]
@@ -522,12 +468,6 @@ unsafe impl Send for MPU {}
 impl MPU {
     /// Pointer to the register block
     pub const PTR: *const mpu::RegisterBlock = 0xE000_ED90 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const mpu::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for MPU {
@@ -550,12 +490,6 @@ unsafe impl Send for NVIC {}
 impl NVIC {
     /// Pointer to the register block
     pub const PTR: *const nvic::RegisterBlock = 0xE000_E100 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const nvic::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for NVIC {
@@ -579,12 +513,6 @@ unsafe impl Send for SAU {}
 impl SAU {
     /// Pointer to the register block
     pub const PTR: *const sau::RegisterBlock = 0xE000_EDD0 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const sau::RegisterBlock {
-        Self::PTR
-    }
 }
 
 #[cfg(armv8m)]
@@ -608,12 +536,6 @@ unsafe impl Send for SCB {}
 impl SCB {
     /// Pointer to the register block
     pub const PTR: *const scb::RegisterBlock = 0xE000_ED04 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const scb::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for SCB {
@@ -636,12 +558,6 @@ unsafe impl Send for SYST {}
 impl SYST {
     /// Pointer to the register block
     pub const PTR: *const syst::RegisterBlock = 0xE000_E010 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const syst::RegisterBlock {
-        Self::PTR
-    }
 }
 
 impl ops::Deref for SYST {
@@ -665,12 +581,6 @@ unsafe impl Send for TPIU {}
 impl TPIU {
     /// Pointer to the register block
     pub const PTR: *const tpiu::RegisterBlock = 0xE004_0000 as *const _;
-
-    /// Returns a pointer to the register block (to be deprecated in 0.7)
-    #[inline(always)]
-    pub const fn ptr() -> *const tpiu::RegisterBlock {
-        Self::PTR
-    }
 }
 
 #[cfg(not(armv6m))]