@@ -169,6 +169,23 @@ impl<B: UsbBus> UsbDevice<'_, B> {
169169
170170 // Pending events for endpoint 0?
171171 if ( eps & 1 ) != 0 {
172+ // Handle EP0-IN conditions first. When both EP0-IN and EP0-OUT have completed,
173+ // it is possible that EP0-OUT is a zero-sized out packet to complete the STATUS
174+ // phase of the control transfer. We have to process EP0-IN first to update our
175+ // internal state properly.
176+ if ( ep_in_complete & 1 ) != 0 {
177+ let completed = self . control . handle_in_complete ( ) ;
178+
179+ if !B :: QUIRK_SET_ADDRESS_BEFORE_STATUS {
180+ if completed && self . pending_address != 0 {
181+ self . bus . set_device_address ( self . pending_address ) ;
182+ self . pending_address = 0 ;
183+
184+ self . device_state = UsbDeviceState :: Addressed ;
185+ }
186+ }
187+ }
188+
172189 let req = if ( ep_setup & 1 ) != 0 {
173190 self . control . handle_setup ( )
174191 } else if ( ep_out & 1 ) != 0 {
@@ -185,19 +202,6 @@ impl<B: UsbBus> UsbDevice<'_, B> {
185202 _ => ( ) ,
186203 } ;
187204
188- if ( ep_in_complete & 1 ) != 0 {
189- let completed = self . control . handle_in_complete ( ) ;
190-
191- if !B :: QUIRK_SET_ADDRESS_BEFORE_STATUS {
192- if completed && self . pending_address != 0 {
193- self . bus . set_device_address ( self . pending_address ) ;
194- self . pending_address = 0 ;
195-
196- self . device_state = UsbDeviceState :: Addressed ;
197- }
198- }
199- }
200-
201205 eps &= !1 ;
202206 }
203207
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