Merge #53

53: Update panic-semihosting requirement from 0.5 to 0.6 in /rtic_v0.5/stm32f1_bluepill_blinky r=AfoHT a=dependabot[bot]

Updates the requirements on [panic-semihosting](https://github.com/rust-embedded/cortex-m) to permit the latest version.
<details>
<summary>Changelog</summary>
<p><em>Sourced from <a href="https://github.com/rust-embedded/cortex-m/blob/master/CHANGELOG.md">panic-semihosting's changelog</a>.</em></p>
<blockquote>
<h2>[v0.6.0] - 2019-03-12</h2>
<h3>Fixed</h3>
<ul>
<li>Fix numerous registers which were incorrectly included for thumbv6</li>
<li><code>SHCRS</code> renamed to <code>SHCSR</code> in <code>SCB</code></li>
</ul>
<h3>Added</h3>
<ul>
<li>
<p>Support for ARMv8-M (<code>thumbv8.base</code> and <code>thumbv8.main</code>)</p>
</li>
<li>
<p><code>SCB</code> gained methods to set and clear <code>SLEEPONEXIT</code> bit</p>
</li>
<li>
<p><code>NVIC</code> gained <code>STIR</code> register and methods to request an interrupt</p>
</li>
<li>
<p><code>DCB</code> gained methods to check if debugger is attached</p>
</li>
</ul>
<h2>[v0.5.8] - 2018-10-27</h2>
<h3>Added</h3>
<ul>
<li>
<p><code>SCB</code> gained methods to set, clear and check the pending state of the PendSV
exception.</p>
</li>
<li>
<p><code>SCB</code> gained methods to set, clear and check the pending state of the SysTick
exception.</p>
</li>
<li>
<p><code>SCB</code> gained methods to set and get the priority of system handlers like
SVCall and SysTick.</p>
</li>
<li>
<p><code>NVIC</code> gained <em>static</em> methods, <code>pend</code> and <code>unpend</code>, to set and clear the
pending state of interrupts.</p>
</li>
</ul>
<h3>Changed</h3>
<ul>
<li>The <code>NVIC.{clear,set}_pending</code> methods have been deprecated in favor of
<code>NVIC::{unpend,pend}</code>.</li>
</ul>
<h2>[v0.5.7] - 2018-09-06</h2>
<h3>Added</h3>
<ul>
<li><code>DCB::enable_trace()</code> and <code>DCB::disable_trace()</code></li>
</ul>
<h3>Changed</h3>
<ul>
<li><code>iprintln!</code> no longer depends on <code>iprint!</code>. <code>cortex_m::iprintln!</code> will work
even if <code>cortex_m::iprint</code> has not been imported.</li>
</ul>
<h2>[v0.5.6] - 2018-08-27</h2>
<!-- raw HTML omitted -->
</blockquote>
<p>... (truncated)</p>
</details>
<details>
<summary>Commits</summary>
<ul>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/c61e3af53a9509420f70f4974caa9f6de64d807d"><code>c61e3af</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/135">#135</a></li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/3e580d9d925caa6d2c520578de9f6e397621b0fe"><code>3e580d9</code></a> v0.6.0</li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/563c27a152a98b6d1092415e6385b970ebd0c367"><code>563c27a</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/106">#106</a></li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/3b574e88fb15d704b9c2dacbf643f7ca0fa706ca"><code>3b574e8</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/127">#127</a></li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/771fc84d6ea9d669848baf6acff9e54b36819eb1"><code>771fc84</code></a> Fix STIR register test, remove armv6m-related offsets in NVIC</li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/ac5f677f575847c428767ee553fbd0289794262d"><code>ac5f677</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/97">#97</a></li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/04ee333b63e10d1471e4c4c07c523b8ab111577b"><code>04ee333</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/126">#126</a></li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/2ff4735cda7d5cce9bdff8ac5ec7576998f007a1"><code>2ff4735</code></a> Update is_debugger_attached so as not to clear S_RESET_ST and S_RETIRE_ST</li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/2a15caa848f88420314786c3920d7c181335c686"><code>2a15caa</code></a> Fix rebase syntax error; disable STIR test on armv6m</li>
<li><a href="https://github.com/rust-embedded/cortex-m/commit/595fbd7346f6a1c393adec737b1587501c47bc4d"><code>595fbd7</code></a> Expand is_debugger_attached note</li>
<li>Additional commits viewable in <a href="https://github.com/rust-embedded/cortex-m/compare/v0.5.0...v0.6.0">compare view</a></li>
</ul>
</details>
<br />


Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting ``@dependabot` rebase`.

[//]: # (dependabot-automerge-start)
[//]: # (dependabot-automerge-end)

---

<details>
<summary>Dependabot commands and options</summary>
<br />

You can trigger Dependabot actions by commenting on this PR:
- ``@dependabot` rebase` will rebase this PR
- ``@dependabot` recreate` will recreate this PR, overwriting any edits that have been made to it
- ``@dependabot` merge` will merge this PR after your CI passes on it
- ``@dependabot` squash and merge` will squash and merge this PR after your CI passes on it
- ``@dependabot` cancel merge` will cancel a previously requested merge and block automerging
- ``@dependabot` reopen` will reopen this PR if it is closed
- ``@dependabot` close` will close this PR and stop Dependabot recreating it. You can achieve the same result by closing it manually
- ``@dependabot` ignore this major version` will close this PR and stop Dependabot creating any more for this major version (unless you reopen the PR or upgrade to it yourself)
- ``@dependabot` ignore this minor version` will close this PR and stop Dependabot creating any more for this minor version (unless you reopen the PR or upgrade to it yourself)
- ``@dependabot` ignore this dependency` will close this PR and stop Dependabot creating any more for this dependency (unless you reopen the PR or upgrade to it yourself)


</details>

Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
Co-authored-by: Henrik Tjäder <henrik@tjaders.com>

Author: 3 people

rtic_v0.5/stm32f1_bluepill_blinky/Cargo.lock

@@ -9,7 +9,7 @@ version = "0.1.0"
 edition = "2018"
 
 [dependencies]
-panic-semihosting = "0.5"
+panic-semihosting = "0.6"
 cortex-m-semihosting = "0.5.0"
 embedded-hal = "0.2.3"
 cortex-m-rtic = { version = "0.5.9", default-features = false, features = ["cortex-m-7"] }