i2s: don't use apll workaround on Rev.0 chip

Author: redchenjs

main/src/chip/i2s.c

@@ -13,12 +13,13 @@
 
 #define TAG "i2s"
 
+static esp_chip_info_t chip_info;
+
 static int i2s0_sample_rate = 48000;
 static int i2s0_bits_per_sample = 16;
 
 void i2s0_init(void)
 {
-    esp_chip_info_t chip_info;
     esp_chip_info(&chip_info);
     i2s_config_t i2s_config = {
         .mode = I2S_MODE_MASTER | I2S_MODE_TX,                                  // Only TX
@@ -46,7 +47,7 @@ void i2s0_set_sample_rate(int rate)
 {
     if (rate != i2s0_sample_rate) {
         // workaround as i2s apll clock is inaccurate at 44100Hz 16-bit 2ch
-        if (rate == 44100) {
+        if (rate == 44100 && chip_info.revision) {
             rtc_clk_apll_enable(1, 15, 8, 5, 6);
             ESP_LOGW(TAG, "enable workaround for i2s apll clock at 44100Hz 16-bit 2ch");
         } else {