dts: cm5: Fix Ethernet PHY interrupt pull-up

On CM5, the active-low interrupt pin (INT_N) of the Ethernet PHY is
connected to GPIO37. However, an internal pull-up resistor appears to
be missing, which causes the interrupt edge to be missed or not detected
reliably. Fix this by configuring a bias pull-up on the gpio controller.

Signed-off-by: Nicolai Buchwitz <nb@tipi-net.de>

Author: nbuchwitz

arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi

@@ -163,6 +163,8 @@ rp1_target: &pcie2 {
 	phy-handle = <&phy1>;
 	phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <5>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&eth0_irq_pins>;
 
 	phy1: ethernet-phy@0 {
 		reg = <0x0>;
@@ -708,6 +710,14 @@ spi10_cs_pins: &spi10_cs_gpio1 {};
 		gpios = <48 GPIO_ACTIVE_HIGH>;
 		output-high;
 	};
+
+	eth0_irq_pins: eth0_irq_pins {
+		pins = "gpio37";
+		function = "gpio";
+		// workaround missing hardware PU
+		bias-pull-up;
+		input-enable;
+	};
 };
 
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