mmc: bcm2835: Relax the 50MHz overclock check

EMMC clock speeds are based around divisions of 52Mhz, not the 50MHz
used by SD. As such, relax the "full speed" check (intended to stop
any overclock whenever an operation has to be retried) so that any
requested speed of 50MHz or higher will be overclocked.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

Author: pelwell

drivers/mmc/host/bcm2835.c

@@ -1127,7 +1127,7 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
 	const unsigned int MHZ = 1000000;
 	int div;
 
-	if (host->overclock_50 && (clock == 50*MHZ))
+	if (host->overclock_50 && (clock >= 50*MHZ))
 		clock = host->overclock_50 * MHZ + (MHZ - 1);
 
 	/* The SDCDIV register has 11 bits, and holds (div - 2).  But