feat(port_riscv): add InterruptControllerToPort to provide access to the correct instance of xEIE for the selected privilege level

Author: yvt

src/r3_port_riscv/src/lib.md

@@ -46,7 +46,7 @@ The remaining interrupt numbers (≥ [`INTERRUPT_PLATFORM_START`]) are controlle
 
 <span class="center">![interrupts]</span>
 
-Usually, there are more than one interrupt source connected to the external interrupt pin of a hart through an interrupt controller. An interrupt controller driver is responsible for determining the source of an external interrupt and dispatching the appropriate handler. At configuration time, it attaches an interrupt handler to [`INTERRUPT_EXTERNAL`]. The interrupt handler, when called, queries the currently pending interrupt (let's assume the interrupt number is `n`). It can set `mie.MEIE` to allow nested interrupts (assuming the underlying hardware supports that). Then it fetches the corresponding interrupt handler by indexing [`INTERRUPT_HANDLERS`] by `n + INTERRUPT_PLATFORM_START` and calls that.
+Usually, there are more than one interrupt source connected to the external interrupt pin of a hart through an interrupt controller. An interrupt controller driver is responsible for determining the source of an external interrupt and dispatching the appropriate handler. At configuration time, it attaches an interrupt handler to [`INTERRUPT_EXTERNAL`]. The interrupt handler, when called, queries the currently pending interrupt (let's assume the interrupt number is `n`). It may call [`InterruptControllerToPort::enable_external_interrupts`][] to allow nested interrupts (assuming the underlying hardware supports that). Then it fetches the corresponding interrupt handler by indexing [`INTERRUPT_HANDLERS`] by `n + INTERRUPT_PLATFORM_START` and calls that.
 
 The [`PortInterrupts`] implementation generated by `use_port!` delegates method calls to an interrupt controller driver through [`InterruptController`] for these interrupt numbers.
 

src/r3_port_riscv/src/lib.rs

@@ -251,3 +251,20 @@ pub trait InterruptController {
         Err(QueryInterruptLineError::BadParam)
     }
 }
+
+/// An API intended to be used by an interrupt controller driver. Implemented by
+/// [`use_port!`][].
+///
+/// # Safety
+///
+/// These methods are only intended to be called by the [`INTERRUPT_EXTERNAL`]
+/// interrupt handler of the interrupt controller driver attached to `Self`.
+pub trait InterruptControllerToPort {
+    /// Enable external interrupts by setting `mie.MEIE` or its counterpart
+    /// for [`ThreadingOptions::PRIVILEGE_LEVEL`].
+    unsafe fn enable_external_interrupts();
+
+    /// Disable external interrupts by clearing `mie.MEIE` or its counterpart
+    /// for [`ThreadingOptions::PRIVILEGE_LEVEL`].
+    unsafe fn disable_external_interrupts();
+}

src/r3_port_riscv/src/plic/cfg.rs

@@ -5,9 +5,10 @@ use super::plic_regs;
 
 /// Implement [`InterruptController`] and [`Plic`] on the given kernel trait
 /// type using the Platform-Level Interrupt Controller (PLIC) on the target.
-/// **Requires [`PlicOptions`].**
+/// **Requires [`PlicOptions`] and [`InterruptControllerToPort`].**
 ///
 /// [`InterruptController`]: crate::InterruptController
+/// [`InterruptControllerToPort`]: crate::InterruptControllerToPort
 ///
 /// This macro adds `const fn configure_plic(b: &mut CfgBuilder<Self>)` to the
 /// system type. **It should be called by your application's configuration

src/r3_port_riscv/src/plic/imp.rs

@@ -6,10 +6,10 @@ use r3_core::kernel::{
 use r3_kernel::{KernelTraits, System};
 use tock_registers::interfaces::{Readable, Writeable};
 
-use crate::{Plic, INTERRUPT_EXTERNAL, INTERRUPT_PLATFORM_START};
+use crate::{InterruptControllerToPort, Plic, INTERRUPT_EXTERNAL, INTERRUPT_PLATFORM_START};
 
 /// The configuration function.
-pub const fn configure<C, Traits: Plic + KernelTraits>(b: &mut Cfg<C>)
+pub const fn configure<C, Traits: Plic + KernelTraits + InterruptControllerToPort>(b: &mut Cfg<C>)
 where
     C: ~const traits::CfgInterruptLine<System = System<Traits>>,
 {
@@ -36,11 +36,11 @@ pub fn init<Traits: Plic>() {
 }
 
 #[inline]
-fn interrupt_handler<Traits: Plic + KernelTraits>(_: usize) {
+fn interrupt_handler<Traits: Plic + KernelTraits + InterruptControllerToPort>(_: usize) {
     if let Some((token, num)) = claim_interrupt::<Traits>() {
         if let Some(handler) = Traits::INTERRUPT_HANDLERS.get(num) {
             if Traits::USE_NESTING {
-                unsafe { riscv::register::mie::set_mext() };
+                unsafe { Traits::enable_external_interrupts() };
             }
 
             // Safety: The interrupt controller driver is responsible for
@@ -49,7 +49,7 @@ fn interrupt_handler<Traits: Plic + KernelTraits>(_: usize) {
             unsafe { handler() };
 
             if Traits::USE_NESTING {
-                unsafe { riscv::register::mie::clear_mext() };
+                unsafe { Traits::disable_external_interrupts() };
             }
         }
 

src/r3_port_riscv/src/threading/cfg.rs

@@ -48,12 +48,13 @@ pub const PRIVILEGE_LEVEL_SUPERVISOR: u8 = 0b01;
 pub const PRIVILEGE_LEVEL_USER: u8 = 0b00;
 
 /// Define a kernel trait type implementing [`PortThreading`],
-/// [`PortInterrupts`], and [`EntryPoint`].
+/// [`PortInterrupts`], [`InterruptControllerToPort`], and [`EntryPoint`].
 /// **Requires [`ThreadingOptions`], [`Timer`], and [`InterruptController`].**
 ///
 /// [`PortThreading`]: r3_kernel::PortThreading
 /// [`PortInterrupts`]: r3_kernel::PortInterrupts
 /// [`EntryPoint`]: crate::EntryPoint
+/// [`InterruptControllerToPort`]: crate::InterruptControllerToPort
 /// [`InterruptController`]: crate::InterruptController
 /// [`Timer`]: crate::Timer
 #[macro_export]
@@ -76,6 +77,7 @@ macro_rules! use_port {
             use $crate::{
                 threading::imp::{State, TaskState, PortInstance, CsrSet, NumTy},
                 ThreadingOptions, EntryPoint, InterruptController,
+                InterruptControllerToPort,
             };
 
             pub(super) static PORT_STATE: State = State::new();
@@ -105,6 +107,16 @@ macro_rules! use_port {
                 const TRAP_HANDLER: unsafe extern "C" fn() -> ! = State::exception_handler::<Self>;
             }
 
+            impl InterruptControllerToPort for $Traits {
+                unsafe fn enable_external_interrupts() {
+                    unsafe { PORT_STATE.enable_external_interrupts::<Self>() }
+                }
+
+                unsafe fn disable_external_interrupts() {
+                    unsafe { PORT_STATE.disable_external_interrupts::<Self>() }
+                }
+            }
+
             // Assume `$Traits: KernelTraits`
             unsafe impl PortThreading for $Traits {
                 type PortTaskState = TaskState;

src/r3_port_riscv/src/threading/imp.rs

@@ -1048,6 +1048,16 @@ impl State {
         }
     }
 
+    #[inline]
+    pub unsafe fn enable_external_interrupts<Traits: PortInstance>(&self) {
+        Traits::Csr::xie().set(Traits::Csr::XIE_XEIE);
+    }
+
+    #[inline]
+    pub unsafe fn disable_external_interrupts<Traits: PortInstance>(&self) {
+        Traits::Csr::xie().clear(Traits::Csr::XIE_XEIE);
+    }
+
     /// Implements [`crate::EntryPoint::exception_handler`].
     #[naked]
     pub unsafe extern "C" fn exception_handler<Traits: PortInstance>() -> ! {