@@ -46,6 +46,8 @@ struct cpuinfo_x86_isa cpuinfo_x86_detect_isa(
4646 (max_base_index >= 7 ) ? cpuidex (7 , 0 ) : (struct cpuid_regs ){0 , 0 , 0 , 0 };
4747 const struct cpuid_regs structured_feature_info1 =
4848 (max_base_index >= 7 ) ? cpuidex (7 , 1 ) : (struct cpuid_regs ){0 , 0 , 0 , 0 };
49+ const struct cpuid_regs structured_feature_info2 =
50+ (max_base_index >= 7 ) ? cpuidex (0x24 , 0 ) : (struct cpuid_regs ){0 , 0 , 0 , 0 };
4951
5052 const uint32_t processor_capacity_info_index = UINT32_C (0x80000008 );
5153 const struct cpuid_regs processor_capacity_info = (max_extended_index >= processor_capacity_info_index )
@@ -430,10 +432,17 @@ struct cpuinfo_x86_isa cpuinfo_x86_detect_isa(
430432 isa .avx512f = avx512_regs && !!(structured_feature_info0 .ebx & UINT32_C (0x00010000 ));
431433
432434 /*
433- * AVX 10.1 instructions:
435+ * AVX 10.1 instructions: avx 10 isa supported.
436+ * - Intel: edx[bit 19] in structured feature info (ecx = 1).
434437 */
435438 isa .avx10_1 = avx512_regs && !!(structured_feature_info1 .edx & UINT32_C (0x00080000 ));
436439
440+ /*
441+ * AVX 10.2 instructions: avx 10 version information.
442+ * - Intel: ebx[bits 0-7] in structured features info (eax = 24 ecx = 0).
443+ */
444+ isa .avx10_2 = ((structured_feature_info2 .ebx & UINT32_C (0x000000FF )) >= 2 ) && isa .avx10_1 ;
445+
437446 /*
438447 * AVX512PF instructions:
439448 * - Intel: ebx[bit 26] in structured feature info (ecx = 0).
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