Add detection for sme on aarch64. (#257)

This is based on the ARM ComputeLibrary implementation [here](https://github.com/ARM-software/ComputeLibrary/blob/f1929dc994d8e5afae5c77ca66446344119a8592/src/common/cpuinfo/CpuIsaInfo.cpp#L75).

Author: gonnet

include/cpuinfo.h

@@ -1670,6 +1670,7 @@ struct cpuinfo_arm_isa {
 	bool sve;
 	bool sve2;
 	bool i8mm;
+	bool sme;
 	uint32_t svelen;
 #endif
 	bool rdm;
@@ -2052,6 +2053,14 @@ static inline uint32_t cpuinfo_get_max_arm_sve_length(void) {
 #endif
 }
 
+static inline bool cpuinfo_has_arm_sme(void) {
+#if CPUINFO_ARCH_ARM64
+	return cpuinfo_isa.sme;
+#else
+	return false;
+#endif
+}
+
 #if CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
 /* This structure is not a part of stable API. Use cpuinfo_has_riscv_* functions
  * instead. */

src/arm/linux/aarch64-isa.c

@@ -144,6 +144,9 @@ void cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo(
 	if (features2 & CPUINFO_ARM_LINUX_FEATURE2_SVE2) {
 		isa->sve2 = true;
 	}
+	if (features2 & CPUINFO_ARM_LINUX_FEATURE2_SME) {
+		isa->sme = true;
+	}
 	// SVEBF16 is set iff SVE and BF16 are both supported, but the SVEBF16
 	// feature flag was added in Linux kernel before the BF16 feature flag,
 	// so we check for either.

src/arm/linux/api.h

@@ -137,6 +137,7 @@ struct cpuinfo_arm_linux_proc_cpuinfo_cache {
 #define CPUINFO_ARM_LINUX_FEATURE2_DGH UINT32_C(0x00008000)
 #define CPUINFO_ARM_LINUX_FEATURE2_RNG UINT32_C(0x00010000)
 #define CPUINFO_ARM_LINUX_FEATURE2_BTI UINT32_C(0x00020000)
+#define CPUINFO_ARM_LINUX_FEATURE2_SME UINT32_C(0x00800000)
 #endif
 
 #define CPUINFO_ARM_LINUX_VALID_ARCHITECTURE UINT32_C(0x00010000)