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lines changed Original file line number Diff line number Diff line change @@ -60,10 +60,10 @@ impl<T: Config> Pallet<T> {
6060 log:: debug!( "default_alpha_in_i: {default_alpha_in_i:?}" ) ;
6161
6262 // Get alpha_emission total
63- let alpha_emission_i: U96F32 = asfloat ! ( Self :: get_block_emission_for_issuance (
64- Self :: get_alpha_issuance( * netuid_i) . into( )
65- )
66- . unwrap_or ( 0 ) ) ;
63+ let alpha_emission_i: U96F32 = asfloat ! (
64+ Self :: get_block_emission_for_issuance ( Self :: get_alpha_issuance( * netuid_i) . into( ) )
65+ . unwrap_or ( 0 )
66+ ) ;
6767 log:: debug!( "alpha_emission_i: {alpha_emission_i:?}" ) ;
6868
6969 let mut alpha_in_i: U96F32 ;
@@ -208,7 +208,7 @@ impl<T: Config> Pallet<T> {
208208 let root_alpha: U96F32 = root_proportion
209209 . saturating_mul ( alpha_out_i) // Total alpha emission per block remaining.
210210 . saturating_mul ( asfloat ! ( 0.5 ) ) ; // 50% to validators.
211- // Remove root alpha from alpha_out.
211+ // Remove root alpha from alpha_out.
212212 log:: debug!( "root_alpha: {root_alpha:?}" ) ;
213213 // Get pending alpha as original alpha_out - root_alpha.
214214 let pending_alpha: U96F32 = alpha_out_i. saturating_sub ( root_alpha) ;
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