API: add a new MEMCACHE object type for Memory-side Caches

These caches are coming in Intel platforms, and they will be exposed
by the ACPI HMAT table and Linux 5.2+.
KNL MCDRAM in Cache was actually a memory-side cache but the platform
was not ready to expose it.

This is a new (second) "memory" object type (the other one is NUMA node).
It's not considered a "cache" type as other usual CPU-side caches.

Object attributes are identical to usual cache attributes.
These caches have their own virtual depth.
They will be placed between CPU-side parent and NUMA nodes,
in the memory hierarchy of children.

e.g. on KNL in Hybrid mode:
Group(Cluster)
  MemCache
    NUMANode(DDR)
  NUMANode(MCDRAM)
  L2
   PU
   ...

Memory-side caches are disabled by default to avoid disturbing existing
applications where we usually want NUMA nodes as immediate memory children
of CPU-side objects.

This breaks the shmem ABI, which means 2.1 won't be able to share topologies
in shmem with 2.0.

Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>

Author: bgoglin

NEWS

@@ -19,6 +19,8 @@ bug fixes (and other actions) for each version of hwloc since version
 Version 2.1.0
 -------------
 * API
+  + Add the new HWLOC_OBJ_MEMCACHE object type for memory-side caches.
+    - They are filtered-out by default, except in command-line tools.
   + Add HWLOC_RESTRICT_FLAG_BYNODESET and _REMOVE_MEMLESS for restricting
     topologies based on some memory nodes.
   + Add hwloc_topology_set_components() for blacklisting some components

doc/hwloc.doxy

@@ -514,7 +514,7 @@ Make sure to have had a look at those too!
   a NUMA memory node, etc. The different types detected by hwloc are
   detailed in the ::hwloc_obj_type_t enumeration.
 
-  There are four kinds of Objects: Memory (NUMA nodes), I/O (Bridges, PCI and OS devices),
+  There are four kinds of Objects: Memory (NUMA nodes and Memory-side caches), I/O (Bridges, PCI and OS devices),
   Misc, and Normal (everything else, including Machine, Package, Core, PU, CPU Caches, etc.).
   Normal and Memory objects have (non-NULL) CPU sets and nodesets, while I/O and Misc don't.
 
@@ -552,6 +552,16 @@ Make sure to have had a look at those too!
   (see \ref termsanddefs_tree).
   </dd>
 
+<dt>Memory-side Cache</dt>
+  <dd>
+  A cache in front of a specific memory region (e.g. a range of physical addresses).
+  It caches all accesses to that region without caring about which core issued the request.
+  This is the opposite of usual CPU caches where only accesses from the local cores
+  are cached, without caring about the target memory.
+
+  In hwloc, memory-side caches are memory objects placed between their local CPU objects
+  (parent) and the target NUMA node memory (child).
+  </dd>
 </dl>
 
 
@@ -3948,7 +3958,7 @@ hwloc_get_next_child() may still be used to iterate over all children of all lis
 Given the above, objects may now be of 4 kinds:
 <ul>
 <li>Normal (everything not listed below, including Machine, Package, Core, PU, CPU Caches, etc);</li>
-<li>Memory (currently only NUMA nodes), attached to parents as Memory children;</li>
+<li>Memory (currently NUMA nodes or Memory-side Caches), attached to parents as Memory children;</li>
 <li>I/O (Bridges, PCI and OS devices), attached to parents as I/O children;</li>
 <li>Misc objects, attached to parents as Misc children.</li>
 </ul>

hwloc/hwloc2.dtd

@@ -1,6 +1,6 @@
 <!--
   Copyright © 2009      CNRS
-  Copyright © 2009-2017 Inria.  All rights reserved.
+  Copyright © 2009-2019 Inria.  All rights reserved.
   Copyright © 2009-2011 Université Bordeaux.
   See COPYING in top-level directory.
 
@@ -11,7 +11,7 @@
 <!ATTLIST topology version CDATA "">
 
 <!ELEMENT object (page_type*,info*,userdata*,object*)>
-<!ATTLIST object type (Machine | Misc | Group | NUMANode | Package | L1Cache | L2Cache | L3Cache | L4Cache | L5Cache | L1iCache | L2iCache | L3iCache | Core | PU | Bridge | PCIDev | OSDev) #REQUIRED>
+<!ATTLIST object type (Machine | Misc | Group | NUMANode | MemCache | Package | L1Cache | L2Cache | L3Cache | L4Cache | L5Cache | L1iCache | L2iCache | L3iCache | Core | PU | Bridge | PCIDev | OSDev) #REQUIRED>
 <!ATTLIST object subtype CDATA "" >
 <!ATTLIST object os_index CDATA "-1" >
 <!ATTLIST object gp_index CDATA "-1" >

hwloc/topology.c

@@ -1003,29 +1003,31 @@ hwloc_topology_dup(hwloc_topology_t *newp,
 /***** Make sure you update obj_type_priority[] below as well. *****/
 static const unsigned obj_type_order[] = {
     /* first entry is HWLOC_OBJ_MACHINE */  0,
-    /* next entry is HWLOC_OBJ_PACKAGE */  3,
-    /* next entry is HWLOC_OBJ_CORE */     12,
-    /* next entry is HWLOC_OBJ_PU */       16,
-    /* next entry is HWLOC_OBJ_L1CACHE */  10,
-    /* next entry is HWLOC_OBJ_L2CACHE */  8,
-    /* next entry is HWLOC_OBJ_L3CACHE */  6,
-    /* next entry is HWLOC_OBJ_L4CACHE */  5,
-    /* next entry is HWLOC_OBJ_L5CACHE */  4,
-    /* next entry is HWLOC_OBJ_L1ICACHE */ 11,
-    /* next entry is HWLOC_OBJ_L2ICACHE */ 9,
-    /* next entry is HWLOC_OBJ_L3ICACHE */ 7,
+    /* next entry is HWLOC_OBJ_PACKAGE */  4,
+    /* next entry is HWLOC_OBJ_CORE */     13,
+    /* next entry is HWLOC_OBJ_PU */       17,
+    /* next entry is HWLOC_OBJ_L1CACHE */  11,
+    /* next entry is HWLOC_OBJ_L2CACHE */  9,
+    /* next entry is HWLOC_OBJ_L3CACHE */  7,
+    /* next entry is HWLOC_OBJ_L4CACHE */  6,
+    /* next entry is HWLOC_OBJ_L5CACHE */  5,
+    /* next entry is HWLOC_OBJ_L1ICACHE */ 12,
+    /* next entry is HWLOC_OBJ_L2ICACHE */ 10,
+    /* next entry is HWLOC_OBJ_L3ICACHE */ 8,
     /* next entry is HWLOC_OBJ_GROUP */    1,
-    /* next entry is HWLOC_OBJ_NUMANODE */ 2,
-    /* next entry is HWLOC_OBJ_BRIDGE */   13,
-    /* next entry is HWLOC_OBJ_PCI_DEVICE */  14,
-    /* next entry is HWLOC_OBJ_OS_DEVICE */   15,
-    /* next entry is HWLOC_OBJ_MISC */     17
+    /* next entry is HWLOC_OBJ_NUMANODE */ 3,
+    /* next entry is HWLOC_OBJ_BRIDGE */   14,
+    /* next entry is HWLOC_OBJ_PCI_DEVICE */  15,
+    /* next entry is HWLOC_OBJ_OS_DEVICE */   16,
+    /* next entry is HWLOC_OBJ_MISC */     18,
+    /* next entry is HWLOC_OBJ_MEMCACHE */ 2
 };
 
 #ifndef NDEBUG /* only used in debug check assert if !NDEBUG */
 static const hwloc_obj_type_t obj_order_type[] = {
   HWLOC_OBJ_MACHINE,
   HWLOC_OBJ_GROUP,
+  HWLOC_OBJ_MEMCACHE,
   HWLOC_OBJ_NUMANODE,
   HWLOC_OBJ_PACKAGE,
   HWLOC_OBJ_L5CACHE,
@@ -1077,7 +1079,8 @@ static const int obj_type_priority[] = {
   /* next entry is HWLOC_OBJ_BRIDGE */      0,
   /* next entry is HWLOC_OBJ_PCI_DEVICE */  100,
   /* next entry is HWLOC_OBJ_OS_DEVICE */   100,
-  /* next entry is HWLOC_OBJ_MISC */        0
+  /* next entry is HWLOC_OBJ_MISC */        0,
+  /* next entry is HWLOC_OBJ_MEMCACHE */    19
 };
 
 int hwloc_compare_types (hwloc_obj_type_t type1, hwloc_obj_type_t type2)
@@ -2698,7 +2701,17 @@ hwloc_list_special_objects(hwloc_topology_t topology, hwloc_obj_t obj)
     /* Insert the main NUMA node list */
     hwloc_append_special_object(&topology->slevels[HWLOC_SLEVEL_NUMANODE], obj);
 
-    /* Recurse */
+    /* Recurse, NUMA nodes only have Misc children */
+    for_each_misc_child(child, obj)
+      hwloc_list_special_objects(topology, child);
+
+  } else if (obj->type == HWLOC_OBJ_MEMCACHE) {
+    obj->next_cousin = NULL;
+    obj->depth = HWLOC_TYPE_DEPTH_MEMCACHE;
+    /* Insert the main MemCache list */
+    hwloc_append_special_object(&topology->slevels[HWLOC_SLEVEL_MEMCACHE], obj);
+
+    /* Recurse, MemCaches have NUMA nodes or Misc children */
     for_each_memory_child(child, obj)
       hwloc_list_special_objects(topology, child);
     for_each_misc_child(child, obj)
@@ -2731,6 +2744,7 @@ hwloc_list_special_objects(hwloc_topology_t topology, hwloc_obj_t obj)
       /* Insert in the main osdev list */
       hwloc_append_special_object(&topology->slevels[HWLOC_SLEVEL_OSDEV], obj);
     }
+
     /* Recurse, I/O only have I/O and Misc children */
     for_each_io_child(child, obj)
       hwloc_list_special_objects(topology, child);
@@ -3337,6 +3351,7 @@ hwloc_topology_setup_defaults(struct hwloc_topology *topology)
   HWLOC_BUILD_ASSERT(HWLOC_SLEVEL_BRIDGE == HWLOC_SLEVEL_FROM_DEPTH(HWLOC_TYPE_DEPTH_BRIDGE));
   HWLOC_BUILD_ASSERT(HWLOC_SLEVEL_PCIDEV == HWLOC_SLEVEL_FROM_DEPTH(HWLOC_TYPE_DEPTH_PCI_DEVICE));
   HWLOC_BUILD_ASSERT(HWLOC_SLEVEL_OSDEV == HWLOC_SLEVEL_FROM_DEPTH(HWLOC_TYPE_DEPTH_OS_DEVICE));
+  HWLOC_BUILD_ASSERT(HWLOC_SLEVEL_MEMCACHE == HWLOC_SLEVEL_FROM_DEPTH(HWLOC_TYPE_DEPTH_MEMCACHE));
 
   /* sane values to type_depth */
   hwloc_reset_normal_type_depths(topology);
@@ -3345,6 +3360,7 @@ hwloc_topology_setup_defaults(struct hwloc_topology *topology)
   topology->type_depth[HWLOC_OBJ_BRIDGE] = HWLOC_TYPE_DEPTH_BRIDGE;
   topology->type_depth[HWLOC_OBJ_PCI_DEVICE] = HWLOC_TYPE_DEPTH_PCI_DEVICE;
   topology->type_depth[HWLOC_OBJ_OS_DEVICE] = HWLOC_TYPE_DEPTH_OS_DEVICE;
+  topology->type_depth[HWLOC_OBJ_MEMCACHE] = HWLOC_TYPE_DEPTH_MEMCACHE;
 
   /* Create the actual machine object, but don't touch its attributes yet
    * since the OS backend may still change the object into something else
@@ -3513,6 +3529,7 @@ hwloc__topology_filter_init(struct hwloc_topology *topology)
   topology->type_filter[HWLOC_OBJ_L1ICACHE] = HWLOC_TYPE_FILTER_KEEP_NONE;
   topology->type_filter[HWLOC_OBJ_L2ICACHE] = HWLOC_TYPE_FILTER_KEEP_NONE;
   topology->type_filter[HWLOC_OBJ_L3ICACHE] = HWLOC_TYPE_FILTER_KEEP_NONE;
+  topology->type_filter[HWLOC_OBJ_MEMCACHE] = HWLOC_TYPE_FILTER_KEEP_NONE;
   topology->type_filter[HWLOC_OBJ_GROUP] = HWLOC_TYPE_FILTER_KEEP_STRUCTURE;
   topology->type_filter[HWLOC_OBJ_MISC] = HWLOC_TYPE_FILTER_KEEP_NONE;
   topology->type_filter[HWLOC_OBJ_BRIDGE] = HWLOC_TYPE_FILTER_KEEP_NONE;
@@ -4426,6 +4443,8 @@ hwloc__check_object(hwloc_topology_t topology, hwloc_bitmap_t gp_indexes, hwloc_
     assert(obj->cpuset);
     if (obj->type == HWLOC_OBJ_NUMANODE)
       assert(obj->depth == HWLOC_TYPE_DEPTH_NUMANODE);
+    else if (obj->type == HWLOC_OBJ_MEMCACHE)
+      assert(obj->depth == HWLOC_TYPE_DEPTH_MEMCACHE);
     else
       assert(obj->depth >= 0);
   }
@@ -4622,7 +4641,8 @@ hwloc_topology_check(struct hwloc_topology *topology)
   HWLOC_BUILD_ASSERT(HWLOC_OBJ_BRIDGE     + 1 == HWLOC_OBJ_PCI_DEVICE);
   HWLOC_BUILD_ASSERT(HWLOC_OBJ_PCI_DEVICE + 1 == HWLOC_OBJ_OS_DEVICE);
   HWLOC_BUILD_ASSERT(HWLOC_OBJ_OS_DEVICE  + 1 == HWLOC_OBJ_MISC);
-  HWLOC_BUILD_ASSERT(HWLOC_OBJ_MISC       + 1 == HWLOC_OBJ_TYPE_MAX);
+  HWLOC_BUILD_ASSERT(HWLOC_OBJ_MISC       + 1 == HWLOC_OBJ_MEMCACHE);
+  HWLOC_BUILD_ASSERT(HWLOC_OBJ_MEMCACHE   + 1 == HWLOC_OBJ_TYPE_MAX);
 
   /* make sure order and priority arrays have the right size */
   HWLOC_BUILD_ASSERT(sizeof(obj_type_order)/sizeof(*obj_type_order) == HWLOC_OBJ_TYPE_MAX);
@@ -4668,6 +4688,7 @@ hwloc_topology_check(struct hwloc_topology *topology)
     int d;
     type = hwloc_get_depth_type(topology, j);
     assert(type != HWLOC_OBJ_NUMANODE);
+    assert(type != HWLOC_OBJ_MEMCACHE);
     assert(type != HWLOC_OBJ_PCI_DEVICE);
     assert(type != HWLOC_OBJ_BRIDGE);
     assert(type != HWLOC_OBJ_OS_DEVICE);
@@ -4683,6 +4704,9 @@ hwloc_topology_check(struct hwloc_topology *topology)
     if (type == HWLOC_OBJ_NUMANODE) {
       assert(d == HWLOC_TYPE_DEPTH_NUMANODE);
       assert(hwloc_get_depth_type(topology, d) == HWLOC_OBJ_NUMANODE);
+    } else if (type == HWLOC_OBJ_MEMCACHE) {
+      assert(d == HWLOC_TYPE_DEPTH_MEMCACHE);
+      assert(hwloc_get_depth_type(topology, d) == HWLOC_OBJ_MEMCACHE);
     } else if (type == HWLOC_OBJ_BRIDGE) {
       assert(d == HWLOC_TYPE_DEPTH_BRIDGE);
       assert(hwloc_get_depth_type(topology, d) == HWLOC_OBJ_BRIDGE);

hwloc/traversal.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2018 Inria.  All rights reserved.
+ * Copyright © 2009-2019 Inria.  All rights reserved.
  * Copyright © 2009-2010 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -41,6 +41,8 @@ hwloc_get_depth_type (hwloc_topology_t topology, int depth)
       return HWLOC_OBJ_OS_DEVICE;
     case HWLOC_TYPE_DEPTH_MISC:
       return HWLOC_OBJ_MISC;
+    case HWLOC_TYPE_DEPTH_MEMCACHE:
+      return HWLOC_OBJ_MEMCACHE;
     default:
       return HWLOC_OBJ_TYPE_NONE;
     }
@@ -238,6 +240,7 @@ hwloc_obj_type_string (hwloc_obj_type_t obj)
     case HWLOC_OBJ_MACHINE: return "Machine";
     case HWLOC_OBJ_MISC: return "Misc";
     case HWLOC_OBJ_GROUP: return "Group";
+    case HWLOC_OBJ_MEMCACHE: return "MemCache";
     case HWLOC_OBJ_NUMANODE: return "NUMANode";
     case HWLOC_OBJ_PACKAGE: return "Package";
     case HWLOC_OBJ_L1CACHE: return "L1Cache";
@@ -337,6 +340,9 @@ hwloc_type_sscanf(const char *string, hwloc_obj_type_t *typep,
   } else if (hwloc__type_match(string, "numanode", 2)
 	     || hwloc__type_match(string, "node", 2)) { /* for convenience */
     type = HWLOC_OBJ_NUMANODE;
+  } else if (hwloc__type_match(string, "memcache", 5)
+	     || hwloc__type_match(string, "memory-side cache", 8)) {
+    type = HWLOC_OBJ_MEMCACHE;
   } else if (hwloc__type_match(string, "package", 2)
 	     || hwloc__type_match(string, "socket", 2)) { /* backward compat with v1.10 */
     type = HWLOC_OBJ_PACKAGE;
@@ -468,6 +474,7 @@ hwloc_obj_type_snprintf(char * __hwloc_restrict string, size_t size, hwloc_obj_t
   case HWLOC_OBJ_MISC:
   case HWLOC_OBJ_MACHINE:
   case HWLOC_OBJ_NUMANODE:
+  case HWLOC_OBJ_MEMCACHE:
   case HWLOC_OBJ_PACKAGE:
   case HWLOC_OBJ_CORE:
   case HWLOC_OBJ_PU:
@@ -570,6 +577,7 @@ hwloc_obj_attr_snprintf(char * __hwloc_restrict string, size_t size, hwloc_obj_t
   case HWLOC_OBJ_L1ICACHE:
   case HWLOC_OBJ_L2ICACHE:
   case HWLOC_OBJ_L3ICACHE:
+  case HWLOC_OBJ_MEMCACHE:
     if (verbose) {
       char assoc[32];
       if (obj->attr->cache.associativity == -1)

include/hwloc.h

@@ -234,6 +234,10 @@ typedef enum {
 			  * It is usually close to some cores (the corresponding objects
 			  * are descendants of the NUMA node object in the hwloc tree).
 			  *
+			  * This is the smallest object representing Memory resources,
+			  * it cannot have any child except Misc objects.
+			  * However it may have Memory-side cache parents.
+			  *
 			  * There is always at least one such object in the topology
 			  * even if the machine is not NUMA.
 			  *
@@ -280,6 +284,19 @@ typedef enum {
 			  * Misc objects have NULL CPU and node sets.
 			  */
 
+  HWLOC_OBJ_MEMCACHE,	/**< \brief Memory-side cache (filtered out by default).
+			  * A cache in front of a specific NUMA node.
+			  *
+			  * This object always has at least one NUMA node as a memory child.
+			  *
+			  * Memory objects are not listed in the main children list,
+			  * but rather in the dedicated Memory children list.
+			  *
+			  * Memory-side cache have a special depth ::HWLOC_TYPE_DEPTH_MEMCACHE
+			  * instead of a normal depth just like other objects in the
+			  * main tree.
+			  */
+
   HWLOC_OBJ_TYPE_MAX    /**< \private Sentinel value */
 } hwloc_obj_type_t;
 
@@ -435,9 +452,15 @@ struct hwloc_obj {
 					 * These children are listed in \p memory_first_child.
 					 */
   struct hwloc_obj *memory_first_child;	/**< \brief First Memory child.
-					 * NUMA nodes are listed here (\p memory_arity and \p memory_first_child)
+					 * NUMA nodes and Memory-side caches are listed here
+					 * (\p memory_arity and \p memory_first_child)
 					 * instead of in the normal children list.
 					 * See also hwloc_obj_type_is_memory().
+					 *
+					 * A memory hierarchy starts from a normal CPU-side object
+					 * (e.g. Package) and ends with NUMA nodes as leaves.
+					 * There might exist some memory-side caches between them
+					 * in the middle of the memory subtree.
 					 */
   /**@}*/
 
@@ -770,7 +793,8 @@ enum hwloc_get_type_depth_e {
     HWLOC_TYPE_DEPTH_BRIDGE = -4,     /**< \brief Virtual depth for bridge object level. \hideinitializer */
     HWLOC_TYPE_DEPTH_PCI_DEVICE = -5, /**< \brief Virtual depth for PCI device object level. \hideinitializer */
     HWLOC_TYPE_DEPTH_OS_DEVICE = -6,  /**< \brief Virtual depth for software device object level. \hideinitializer */
-    HWLOC_TYPE_DEPTH_MISC = -7        /**< \brief Virtual depth for Misc object. \hideinitializer */
+    HWLOC_TYPE_DEPTH_MISC = -7,       /**< \brief Virtual depth for Misc object. \hideinitializer */
+    HWLOC_TYPE_DEPTH_MEMCACHE = -8    /**< \brief Virtual depth for MemCache object. \hideinitializer */
 };
 
 /** \brief Return the depth of parents where memory objects are attached.
@@ -2088,11 +2112,15 @@ HWLOC_DECLSPEC int hwloc_topology_get_type_filter(hwloc_topology_t topology, hwl
  */
 HWLOC_DECLSPEC int hwloc_topology_set_all_types_filter(hwloc_topology_t topology, enum hwloc_type_filter_e filter);
 
-/** \brief Set the filtering for all cache object types.
+/** \brief Set the filtering for all CPU cache object types.
+ *
+ * Memory-side caches are not involved since they are not CPU caches.
  */
 HWLOC_DECLSPEC int hwloc_topology_set_cache_types_filter(hwloc_topology_t topology, enum hwloc_type_filter_e filter);
 
-/** \brief Set the filtering for all instruction cache object types.
+/** \brief Set the filtering for all CPU instruction cache object types.
+ *
+ * Memory-side caches are not involved since they are not CPU caches.
  */
 HWLOC_DECLSPEC int hwloc_topology_set_icache_types_filter(hwloc_topology_t topology, enum hwloc_type_filter_e filter);
 

include/hwloc/helper.h

@@ -527,30 +527,36 @@ hwloc_obj_type_is_io(hwloc_obj_type_t type);
  *
  * Memory objects are objects attached to their parents
  * in the Memory children list.
- * This current only includes NUMA nodes.
+ * This current includes NUMA nodes and Memory-side caches.
  *
  * \return 1 if an object of type \p type is a Memory object, 0 otherwise.
  */
 HWLOC_DECLSPEC int
 hwloc_obj_type_is_memory(hwloc_obj_type_t type);
 
-/** \brief Check whether an object type is a Cache (Data, Unified or Instruction).
+/** \brief Check whether an object type is a CPU Cache (Data, Unified or Instruction).
+ *
+ * Memory-side caches are not CPU caches.
  *
  * \return 1 if an object of type \p type is a Cache, 0 otherwise.
  */
 HWLOC_DECLSPEC int
 hwloc_obj_type_is_cache(hwloc_obj_type_t type);
 
-/** \brief Check whether an object type is a Data or Unified Cache.
+/** \brief Check whether an object type is a CPU Data or Unified Cache.
+ *
+ * Memory-side caches are not CPU caches.
  *
- * \return 1 if an object of type \p type is a Data or Unified Cache, 0 otherwise.
+ * \return 1 if an object of type \p type is a CPU Data or Unified Cache, 0 otherwise.
  */
 HWLOC_DECLSPEC int
 hwloc_obj_type_is_dcache(hwloc_obj_type_t type);
 
-/** \brief Check whether an object type is a Instruction Cache,
+/** \brief Check whether an object type is a CPU Instruction Cache,
+ *
+ * Memory-side caches are not CPU caches.
  *
- * \return 1 if an object of type \p type is a Instruction Cache, 0 otherwise.
+ * \return 1 if an object of type \p type is a CPU Instruction Cache, 0 otherwise.
  */
 HWLOC_DECLSPEC int
 hwloc_obj_type_is_icache(hwloc_obj_type_t type);

include/hwloc/rename.h

@@ -49,6 +49,7 @@ extern "C" {
 
 #define HWLOC_OBJ_MACHINE HWLOC_NAME_CAPS(OBJ_MACHINE)
 #define HWLOC_OBJ_NUMANODE HWLOC_NAME_CAPS(OBJ_NUMANODE)
+#define HWLOC_OBJ_MEMCACHE HWLOC_NAME_CAPS(OBJ_MEMCACHE)
 #define HWLOC_OBJ_PACKAGE HWLOC_NAME_CAPS(OBJ_PACKAGE)
 #define HWLOC_OBJ_CORE HWLOC_NAME_CAPS(OBJ_CORE)
 #define HWLOC_OBJ_PU HWLOC_NAME_CAPS(OBJ_PU)
@@ -183,6 +184,7 @@ extern "C" {
 #define HWLOC_TYPE_DEPTH_OS_DEVICE HWLOC_NAME_CAPS(TYPE_DEPTH_OS_DEVICE)
 #define HWLOC_TYPE_DEPTH_MISC HWLOC_NAME_CAPS(TYPE_DEPTH_MISC)
 #define HWLOC_TYPE_DEPTH_NUMANODE HWLOC_NAME_CAPS(TYPE_DEPTH_NUMANODE)
+#define HWLOC_TYPE_DEPTH_MEMCACHE HWLOC_NAME_CAPS(TYPE_DEPTH_MEMCACHE)
 
 #define hwloc_get_depth_type HWLOC_NAME(get_depth_type)
 #define hwloc_get_nbobjs_by_depth HWLOC_NAME(get_nbobjs_by_depth)