WIP. Use XOR3 in additional locations.

Author: onethumb

src/arch/vpclmulqdq.rs

@@ -192,7 +192,7 @@ impl VpclmulqdqOps {
 
     /// Fold from 4 x 256-bit to 1 x 128-bit
     #[inline]
-    #[target_feature(enable = "avx2,sse2,sse4.1,pclmulqdq")]
+    #[target_feature(enable = "avx2,sse2,sse4.1,pclmulqdq,avx512f,avx512vl,vpclmulqdq")]
     unsafe fn fold_from_256_to_128(
         &self,
         x: [Simd256; 4],
@@ -242,7 +242,7 @@ impl VpclmulqdqOps {
             // Fold and XOR
             let folded = self.carryless_mul_00(v128[i], fold_coefficients[i]);
             let folded2 = self.carryless_mul_11(v128[i], fold_coefficients[i]);
-            acc = self.xor_vectors(acc, self.xor_vectors(folded, folded2));
+            acc = self.xor3_vectors(acc, folded, folded2);
         }
 
         acc

src/crc64/algorithm.rs

@@ -114,7 +114,7 @@ impl EnhancedCrcWidth for crate::structs::Width64 {
             let clmul1 = ops.carryless_mul_00(x, mu_poly);
             let clmul2 = ops.carryless_mul_10(clmul1, mu_poly);
             let clmul1_shifted = ops.shift_left_8(clmul1);
-            let final_xor = ops.xor_vectors(ops.xor_vectors(clmul2, clmul1_shifted), x);
+            let final_xor = ops.xor3_vectors(clmul2, clmul1_shifted, x);
 
             ops.extract_u64s(final_xor)[1]
         } else {