@@ -109,87 +109,49 @@ static enum reg_enum whichreg(opflags_t regflags, int regval, uint32_t rex)
109109}
110110
111111/*
112- * An implicit register operand
112+ * An implicit register operand.
113113 */
114+
115+ /* Deal with OpenWatcom 64-bit switch() braindamage */
116+ #ifdef __WATCOMC__
117+ # define imp (op ,rn ) if (regflags == op) return rn
118+ # define impdef (rn ) return rn
119+ #else
120+ # define imp (op ,rn ) case op: return rn
121+ # define impdef (rn ) default: return rn
122+ #endif
123+
114124static enum reg_enum implicit_reg (opflags_t regflags )
115125{
116126#ifndef __WATCOMC__
117- switch (regflags ) {
118- case REG_AL : return R_AL ;
119- case REG_AX : return R_AX ;
120- case REG_EAX : return R_EAX ;
121- case REG_RAX : return R_RAX ;
122- case REG_DL : return R_DL ;
123- case REG_DX : return R_DX ;
124- case REG_EDX : return R_EDX ;
125- case REG_RDX : return R_RDX ;
126- case REG_CL : return R_CL ;
127- case REG_CX : return R_CX ;
128- case REG_ECX : return R_ECX ;
129- case REG_RCX : return R_RCX ;
130- case FPU0 : return R_ST0 ;
131- case XMM0 : return R_XMM0 ;
132- case YMM0 : return R_YMM0 ;
133- case ZMM0 : return R_ZMM0 ;
134- case REG_ES : return R_ES ;
135- case REG_CS : return R_CS ;
136- case REG_SS : return R_SS ;
137- case REG_DS : return R_DS ;
138- case REG_FS : return R_FS ;
139- case REG_GS : return R_GS ;
140- case OPMASK0 : return R_K0 ;
141- default : return 0 ;
142- }
143- #else
144- /* Open Watcom does not support 64-bit constants at *case*. */
145- if (regflags == REG_AL )
146- return R_AL ;
147- if (regflags == REG_AX )
148- return R_AX ;
149- if (regflags == REG_EAX )
150- return R_EAX ;
151- if (regflags == REG_RAX )
152- return R_RAX ;
153- if (regflags == REG_DL )
154- return R_DL ;
155- if (regflags == REG_DX )
156- return R_DX ;
157- if (regflags == REG_EDX )
158- return R_EDX ;
159- if (regflags == REG_RDX )
160- return R_RDX ;
161- if (regflags == REG_CL )
162- return R_CL ;
163- if (regflags == REG_CX )
164- return R_CX ;
165- if (regflags == REG_ECX )
166- return R_ECX ;
167- if (regflags == REG_RCX )
168- return R_RCX ;
169- if (regflags == FPU0 )
170- return R_ST0 ;
171- if (regflags == XMM0 )
172- return R_XMM0 ;
173- if (regflags == YMM0 )
174- return R_YMM0 ;
175- if (regflags == ZMM0 )
176- return R_ZMM0 ;
177- if (regflags == REG_ES )
178- return R_ES ;
179- if (regflags == REG_CS )
180- return R_CS ;
181- if (regflags == REG_SS )
182- return R_SS ;
183- if (regflags == REG_DS )
184- return R_DS ;
185- if (regflags == REG_FS )
186- return R_FS ;
187- if (regflags == REG_GS )
188- return R_GS ;
189- if (regflags == OPMASK0 )
190- return R_K0 ;
191- return 0 ;
127+ switch (regflags )
192128#endif
129+ {
130+ imp (REG_AL ,R_AL );
131+ imp (REG_AX ,R_AX );
132+ imp (REG_EAX ,R_EAX );
133+ imp (REG_RAX ,R_RAX );
134+ imp (REG_DL ,R_DL );
135+ imp (REG_DX ,R_DX );
136+ imp (REG_EDX ,R_EDX );
137+ imp (REG_RDX ,R_RDX );
138+ imp (REG_CL ,R_CL );
139+ imp (REG_CX ,R_CX );
140+ imp (REG_ECX ,R_ECX );
141+ imp (REG_RCX ,R_RCX );
142+ imp (FPU0 ,R_ST0 );
143+ imp (XMM0 ,R_XMM0 );
144+ imp (YMM0 ,R_YMM0 );
145+ imp (ZMM0 ,R_ZMM0 );
146+ imp (REG_ES ,R_ES );
147+ imp (REG_CS ,R_CS );
148+ imp (REG_SS ,R_SS );
149+ imp (REG_DS ,R_DS );
150+ imp (REG_FS ,R_FS );
151+ imp (REG_GS ,R_GS );
152+ imp (OPMASK0 ,R_K0 );
153+ impdef (0 );
154+ }
193155}
194156
195157/*
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