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pci: less verbose output by default
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mythril/src/virtdev/pci.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -222,8 +222,8 @@ impl EmulatedDevice for PciRootComplex {
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device.config_space.read_register(register)
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>> (offset * 8);
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val.copy_from_u32(res);
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info!(
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"port=0x{:x}, register=0x{:x}, offset=0x{:x}, val={}",
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debug!(
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"pci: port=0x{:x}, register=0x{:x}, offset=0x{:x}, val={}",
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port, register, offset, val
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);
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}
@@ -248,8 +248,8 @@ impl EmulatedDevice for PciRootComplex {
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self.current_address = addr & 0x7fffffffu32;
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}
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_ => {
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info!(
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"Attempt to write to port=0x{:x} (addr=0x{:x}). Ignoring.",
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debug!(
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"pci: Attempt to write to port=0x{:x} (addr=0x{:x}). Ignoring.",
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port, self.current_address
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);
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}

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