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| 1 | +#pragma once |
| 2 | + |
| 3 | +#include <algorithm> |
| 4 | +#include <modm/architecture/interface/i2c_device.hpp> |
| 5 | +#include <modm/architecture/interface/register.hpp> |
| 6 | +#include <modm/math/utils/endianness.hpp> |
| 7 | + |
| 8 | +template<typename I2cMaster> |
| 9 | +class Qmc5883l; |
| 10 | + |
| 11 | +struct Qmc5883lRegisters |
| 12 | +{ |
| 13 | +protected: |
| 14 | + /// @cond |
| 15 | + /// The addresses of the Configuration and Data Registers |
| 16 | + enum class Register : uint8_t |
| 17 | + { |
| 18 | + DataX_Lsb = 0x00, |
| 19 | + DataX_Msb = 0x01, |
| 20 | + DataY_Lsb = 0x02, |
| 21 | + DataY_Msb = 0x03, |
| 22 | + DataZ_Lsb = 0x04, |
| 23 | + DataZ_Msb = 0x05, |
| 24 | + Status = 0x06, |
| 25 | + Tout_Lsb = 0x07, |
| 26 | + Tout_Msb = 0x08, |
| 27 | + Control1 = 0x09, |
| 28 | + Control2 = 0x0a, |
| 29 | + SetReset = 0x0b, |
| 30 | + }; |
| 31 | + /// @endcond |
| 32 | +public: |
| 33 | + enum class Status : uint8_t |
| 34 | + { |
| 35 | + DOR = modm::Bit2, |
| 36 | + OVL = modm::Bit1, |
| 37 | + DRDY = modm::Bit0, |
| 38 | + }; |
| 39 | + MODM_FLAGS8(Status); |
| 40 | + |
| 41 | +public: |
| 42 | + enum class Control1 : uint8_t |
| 43 | + { |
| 44 | + OSR1 = modm::Bit7, |
| 45 | + OSR0 = modm::Bit6, |
| 46 | + OversampleRate_Mask = OSR1 | OSR0, |
| 47 | + |
| 48 | + RNG1 = modm::Bit5, |
| 49 | + RNG0 = modm::Bit4, |
| 50 | + FullScale_Mask = RNG1 | RNG0, |
| 51 | + |
| 52 | + ODR1 = modm::Bit3, |
| 53 | + ODR0 = modm::Bit2, |
| 54 | + OutputDataRate_Mask = ODR1 | ODR0, |
| 55 | + |
| 56 | + MODE1 = modm::Bit1, |
| 57 | + MODE0 = modm::Bit0, |
| 58 | + Mode_Mask = MODE1 | MODE0, |
| 59 | + }; |
| 60 | + MODM_FLAGS8(Control1); |
| 61 | + |
| 62 | + enum class Control2 : uint8_t |
| 63 | + { |
| 64 | + SOFT_RST = modm::Bit7, |
| 65 | + ROL_PNT = modm::Bit6, |
| 66 | + INT_ENB = modm::Bit0, |
| 67 | + }; |
| 68 | + MODM_FLAGS8(Control2); |
| 69 | + |
| 70 | +public: |
| 71 | + enum class OversampleRate : uint8_t |
| 72 | + { |
| 73 | + _512 = 0, |
| 74 | + _256 = int(Control1::OSR0), |
| 75 | + _128 = int(Control1::OSR1), |
| 76 | + _64 = int(Control1::OSR0) | int(Control1::OSR1), |
| 77 | + }; |
| 78 | + |
| 79 | + MODM_FLAGS_CONFIG(Control1, OversampleRate); |
| 80 | + |
| 81 | + enum class FullScale : uint8_t |
| 82 | + { |
| 83 | + _2G = 0, |
| 84 | + _8G = int(Control1::RNG0), |
| 85 | + }; |
| 86 | + |
| 87 | + MODM_FLAGS_CONFIG(Control1, FullScale); |
| 88 | + |
| 89 | + enum class OutputDataRate : uint8_t |
| 90 | + { |
| 91 | + _10Hz = 0, |
| 92 | + _50Hz = int(Control1::ODR0), |
| 93 | + _100Hz = int(Control1::ODR1), |
| 94 | + _200Hz = int(Control1::ODR0) | int(Control1::ODR1), |
| 95 | + }; |
| 96 | + |
| 97 | + MODM_FLAGS_CONFIG(Control1, OutputDataRate); |
| 98 | + |
| 99 | + enum class Mode : uint8_t |
| 100 | + { |
| 101 | + StandBy = 0, |
| 102 | + Continious = int(Control1::MODE0), |
| 103 | + }; |
| 104 | + |
| 105 | + MODM_FLAGS_CONFIG(Control1, Mode); |
| 106 | + |
| 107 | +public: |
| 108 | + struct modm_packed Data |
| 109 | + { |
| 110 | + template<class I2cMaster> |
| 111 | + friend class Qmc5883l; |
| 112 | + |
| 113 | + protected: |
| 114 | + uint8_t data[7]; |
| 115 | + |
| 116 | + template<Register R, uint8_t Offset = uint8_t(R)> |
| 117 | + int16_t inline getWord() |
| 118 | + { |
| 119 | + static_assert(Offset < sizeof data); |
| 120 | + const auto value = reinterpret_cast<int16_t *>(data + Offset); |
| 121 | + return modm::fromLittleEndian(*value); |
| 122 | + } |
| 123 | + }; |
| 124 | +}; |
| 125 | + |
| 126 | +template<class I2cMaster> |
| 127 | +class Qmc5883l : public Qmc5883lRegisters, public modm::I2cDevice<I2cMaster> |
| 128 | +{ |
| 129 | + /// @cond |
| 130 | + Data &data; |
| 131 | + /// @endcond |
| 132 | + uint8_t buffer[sizeof data.data]; |
| 133 | + |
| 134 | + modm::ResumableResult<bool> |
| 135 | + writeRegister(Register reg, uint8_t value) |
| 136 | + { |
| 137 | + RF_BEGIN(); |
| 138 | + |
| 139 | + buffer[0] = uint8_t(reg); |
| 140 | + buffer[1] = value; |
| 141 | + this->transaction.configureWrite(buffer, 2); |
| 142 | + |
| 143 | + RF_END_RETURN_CALL(this->runTransaction()); |
| 144 | + } |
| 145 | + |
| 146 | +public: |
| 147 | + Qmc5883l(Data &data, uint8_t address = 0x0d) : modm::I2cDevice<I2cMaster>(address), data(data) |
| 148 | + {} |
| 149 | + |
| 150 | + auto x() { return data.getWord<Register::DataX_Lsb>(); } |
| 151 | + |
| 152 | + auto y() { return data.getWord<Register::DataY_Lsb>(); } |
| 153 | + |
| 154 | + auto z() { return data.getWord<Register::DataZ_Lsb>(); } |
| 155 | + |
| 156 | + auto status() { return Status_t(data.data[uint8_t(Register::Status)]); } |
| 157 | + |
| 158 | +public: |
| 159 | + modm::ResumableResult<bool> |
| 160 | + initialize() |
| 161 | + { |
| 162 | + // Per datasheet: |
| 163 | + // wihtout any additional explanations recommended to set to 0x01. |
| 164 | + return writeRegister(Register::SetReset, 0x01); |
| 165 | + } |
| 166 | + |
| 167 | + modm::ResumableResult<bool> |
| 168 | + configure(Mode_t mode, Control1_t control) |
| 169 | + { |
| 170 | + control |= mode; |
| 171 | + return writeRegister(Register::Control1, control.value); |
| 172 | + } |
| 173 | + |
| 174 | + modm::ResumableResult<bool> |
| 175 | + configure(Control2_t control) |
| 176 | + { |
| 177 | + return writeRegister(Register::Control2, control.value); |
| 178 | + } |
| 179 | + |
| 180 | + modm::ResumableResult<bool> |
| 181 | + readData() |
| 182 | + { |
| 183 | + RF_BEGIN(); |
| 184 | + |
| 185 | + buffer[0] = uint8_t(Register::DataX_Lsb); |
| 186 | + this->transaction.configureWriteRead(buffer, 1, buffer, sizeof buffer); |
| 187 | + |
| 188 | + if (RF_CALL(this->runTransaction())) |
| 189 | + { |
| 190 | + std::copy_n(buffer, sizeof data.data, data.data); |
| 191 | + RF_RETURN(true); |
| 192 | + } |
| 193 | + |
| 194 | + RF_END_RETURN(false); |
| 195 | + } |
| 196 | +}; |
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