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aarch64: check for uzp1 and uzp2 
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2 files changed

+89
-19
lines changed

2 files changed

+89
-19
lines changed

‎stdarch/crates/core_arch/src/arm_shared/neon/generated.rs‎

Lines changed: 85 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -74058,7 +74058,11 @@ pub fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t {
7405874058
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7405974059
#[cfg_attr(
7406074060
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74061-
assert_instr(uzp)
74061+
assert_instr(uzp1)
74062+
)]
74063+
#[cfg_attr(
74064+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74065+
assert_instr(uzp2)
7406274066
)]
7406374067
#[target_feature(enable = "neon,fp16")]
7406474068
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
@@ -74076,7 +74080,11 @@ pub fn vuzp_f16(a: float16x4_t, b: float16x4_t) -> float16x4x2_t {
7407674080
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7407774081
#[cfg_attr(
7407874082
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74079-
assert_instr(uzp)
74083+
assert_instr(uzp1)
74084+
)]
74085+
#[cfg_attr(
74086+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74087+
assert_instr(uzp2)
7408074088
)]
7408174089
#[target_feature(enable = "neon,fp16")]
7408274090
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
@@ -74182,7 +74190,11 @@ pub fn vuzp_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2x2_t {
7418274190
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7418374191
#[cfg_attr(
7418474192
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74185-
assert_instr(uzp)
74193+
assert_instr(uzp1)
74194+
)]
74195+
#[cfg_attr(
74196+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74197+
assert_instr(uzp2)
7418674198
)]
7418774199
#[cfg_attr(
7418874200
not(target_arch = "arm"),
@@ -74207,7 +74219,11 @@ pub fn vuzpq_f32(a: float32x4_t, b: float32x4_t) -> float32x4x2_t {
7420774219
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7420874220
#[cfg_attr(
7420974221
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74210-
assert_instr(uzp)
74222+
assert_instr(uzp1)
74223+
)]
74224+
#[cfg_attr(
74225+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74226+
assert_instr(uzp2)
7421174227
)]
7421274228
#[cfg_attr(
7421374229
not(target_arch = "arm"),
@@ -74232,7 +74248,11 @@ pub fn vuzp_s8(a: int8x8_t, b: int8x8_t) -> int8x8x2_t {
7423274248
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7423374249
#[cfg_attr(
7423474250
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74235-
assert_instr(uzp)
74251+
assert_instr(uzp1)
74252+
)]
74253+
#[cfg_attr(
74254+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74255+
assert_instr(uzp2)
7423674256
)]
7423774257
#[cfg_attr(
7423874258
not(target_arch = "arm"),
@@ -74265,7 +74285,11 @@ pub fn vuzpq_s8(a: int8x16_t, b: int8x16_t) -> int8x16x2_t {
7426574285
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7426674286
#[cfg_attr(
7426774287
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74268-
assert_instr(uzp)
74288+
assert_instr(uzp1)
74289+
)]
74290+
#[cfg_attr(
74291+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74292+
assert_instr(uzp2)
7426974293
)]
7427074294
#[cfg_attr(
7427174295
not(target_arch = "arm"),
@@ -74290,7 +74314,11 @@ pub fn vuzp_s16(a: int16x4_t, b: int16x4_t) -> int16x4x2_t {
7429074314
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7429174315
#[cfg_attr(
7429274316
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74293-
assert_instr(uzp)
74317+
assert_instr(uzp1)
74318+
)]
74319+
#[cfg_attr(
74320+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74321+
assert_instr(uzp2)
7429474322
)]
7429574323
#[cfg_attr(
7429674324
not(target_arch = "arm"),
@@ -74315,7 +74343,11 @@ pub fn vuzpq_s16(a: int16x8_t, b: int16x8_t) -> int16x8x2_t {
7431574343
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7431674344
#[cfg_attr(
7431774345
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74318-
assert_instr(uzp)
74346+
assert_instr(uzp1)
74347+
)]
74348+
#[cfg_attr(
74349+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74350+
assert_instr(uzp2)
7431974351
)]
7432074352
#[cfg_attr(
7432174353
not(target_arch = "arm"),
@@ -74340,7 +74372,11 @@ pub fn vuzpq_s32(a: int32x4_t, b: int32x4_t) -> int32x4x2_t {
7434074372
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7434174373
#[cfg_attr(
7434274374
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74343-
assert_instr(uzp)
74375+
assert_instr(uzp1)
74376+
)]
74377+
#[cfg_attr(
74378+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74379+
assert_instr(uzp2)
7434474380
)]
7434574381
#[cfg_attr(
7434674382
not(target_arch = "arm"),
@@ -74365,7 +74401,11 @@ pub fn vuzp_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8x2_t {
7436574401
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7436674402
#[cfg_attr(
7436774403
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74368-
assert_instr(uzp)
74404+
assert_instr(uzp1)
74405+
)]
74406+
#[cfg_attr(
74407+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74408+
assert_instr(uzp2)
7436974409
)]
7437074410
#[cfg_attr(
7437174411
not(target_arch = "arm"),
@@ -74398,7 +74438,11 @@ pub fn vuzpq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16x2_t {
7439874438
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7439974439
#[cfg_attr(
7440074440
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74401-
assert_instr(uzp)
74441+
assert_instr(uzp1)
74442+
)]
74443+
#[cfg_attr(
74444+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74445+
assert_instr(uzp2)
7440274446
)]
7440374447
#[cfg_attr(
7440474448
not(target_arch = "arm"),
@@ -74423,7 +74467,11 @@ pub fn vuzp_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4x2_t {
7442374467
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7442474468
#[cfg_attr(
7442574469
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74426-
assert_instr(uzp)
74470+
assert_instr(uzp1)
74471+
)]
74472+
#[cfg_attr(
74473+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74474+
assert_instr(uzp2)
7442774475
)]
7442874476
#[cfg_attr(
7442974477
not(target_arch = "arm"),
@@ -74448,7 +74496,11 @@ pub fn vuzpq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8x2_t {
7444874496
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7444974497
#[cfg_attr(
7445074498
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74451-
assert_instr(uzp)
74499+
assert_instr(uzp1)
74500+
)]
74501+
#[cfg_attr(
74502+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74503+
assert_instr(uzp2)
7445274504
)]
7445374505
#[cfg_attr(
7445474506
not(target_arch = "arm"),
@@ -74473,7 +74525,11 @@ pub fn vuzpq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4x2_t {
7447374525
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7447474526
#[cfg_attr(
7447574527
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74476-
assert_instr(uzp)
74528+
assert_instr(uzp1)
74529+
)]
74530+
#[cfg_attr(
74531+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74532+
assert_instr(uzp2)
7447774533
)]
7447874534
#[cfg_attr(
7447974535
not(target_arch = "arm"),
@@ -74498,7 +74554,11 @@ pub fn vuzp_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8x2_t {
7449874554
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7449974555
#[cfg_attr(
7450074556
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74501-
assert_instr(uzp)
74557+
assert_instr(uzp1)
74558+
)]
74559+
#[cfg_attr(
74560+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74561+
assert_instr(uzp2)
7450274562
)]
7450374563
#[cfg_attr(
7450474564
not(target_arch = "arm"),
@@ -74531,7 +74591,11 @@ pub fn vuzpq_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16x2_t {
7453174591
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7453274592
#[cfg_attr(
7453374593
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74534-
assert_instr(uzp)
74594+
assert_instr(uzp1)
74595+
)]
74596+
#[cfg_attr(
74597+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74598+
assert_instr(uzp2)
7453574599
)]
7453674600
#[cfg_attr(
7453774601
not(target_arch = "arm"),
@@ -74556,7 +74620,11 @@ pub fn vuzp_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4x2_t {
7455674620
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vuzp))]
7455774621
#[cfg_attr(
7455874622
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74559-
assert_instr(uzp)
74623+
assert_instr(uzp1)
74624+
)]
74625+
#[cfg_attr(
74626+
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
74627+
assert_instr(uzp2)
7456074628
)]
7456174629
#[cfg_attr(
7456274630
not(target_arch = "arm"),

‎stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9755,7 +9755,8 @@ intrinsics:
97559755
attr:
97569756
- *neon-v7
97579757
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vuzp]]}]]
9758-
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp]]}]]
9758+
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp1]]}]]
9759+
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp2]]}]]
97599760
- *neon-not-arm-stable
97609761
- *neon-cfg-arm-unstable
97619762
safety: safe
@@ -9796,7 +9797,8 @@ intrinsics:
97969797
attr:
97979798
- *neon-v7
97989799
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vuzp]]}]]
9799-
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp]]}]]
9800+
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp1]]}]]
9801+
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp2]]}]]
98009802
- *neon-fp16
98019803
- *neon-unstable-f16
98029804
safety: safe

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