@@ -244,7 +244,6 @@ def __setitem__(self, reg, value):
244244
245245
246246class WM8960 :
247-
248247 _bit_clock_divider_table = {
249248 2 : 0 ,
250249 3 : 1 ,
@@ -399,7 +398,6 @@ def __init__(
399398 self .config_data_format (sysclk , sample_rate , bits )
400399
401400 def deinit (self ):
402-
403401 self .set_module (MODULE_ADC , False )
404402 self .set_module (MODULE_DAC , False )
405403 self .set_module (MODULE_VREF , False )
@@ -467,33 +465,28 @@ def set_speaker_clock(self, sysclk):
467465 )
468466
469467 def set_module (self , module , is_enabled ):
470-
471468 is_enabled = 1 if is_enabled else 0
472469 regs = self .regs
473470
474471 if module == MODULE_ADC :
475-
476472 regs [_POWER1 ] = (
477473 _POWER1_ADCL_MASK | _POWER1_ADCR_MASK ,
478474 (_POWER1_ADCL_MASK | _POWER1_ADCR_MASK ) * is_enabled ,
479475 )
480476
481477 elif module == MODULE_DAC :
482-
483478 regs [_POWER2 ] = (
484479 _POWER2_DACL_MASK | _POWER2_DACR_MASK ,
485480 (_POWER2_DACL_MASK | _POWER2_DACR_MASK ) * is_enabled ,
486481 )
487482
488483 elif module == MODULE_VREF :
489-
490484 regs [_POWER1 ] = (
491485 _POWER1_VREF_MASK ,
492486 (is_enabled << _POWER1_VREF_SHIFT ),
493487 )
494488
495489 elif module == MODULE_LINE_IN :
496-
497490 regs [_POWER1 ] = (
498491 _POWER1_AINL_MASK | _POWER1_AINR_MASK ,
499492 (_POWER1_AINL_MASK | _POWER1_AINR_MASK ) * is_enabled ,
@@ -504,36 +497,31 @@ def set_module(self, module, is_enabled):
504497 )
505498
506499 elif module == MODULE_LINE_OUT :
507-
508500 regs [_POWER2 ] = (
509501 _POWER2_LOUT1_MASK | _POWER2_ROUT1_MASK ,
510502 (_POWER2_LOUT1_MASK | _POWER2_ROUT1_MASK ) * is_enabled ,
511503 )
512504
513505 elif module == MODULE_MIC_BIAS :
514-
515506 regs [_POWER1 ] = (
516507 _POWER1_MICB_MASK ,
517508 (is_enabled << _POWER1_MICB_SHIFT ),
518509 )
519510
520511 elif module == MODULE_SPEAKER :
521-
522512 regs [_POWER2 ] = (
523513 _POWER2_SPKL_MASK | _POWER2_SPKR_MASK ,
524514 (_POWER2_SPKL_MASK | _POWER2_SPKR_MASK ) * is_enabled ,
525515 )
526516 regs [_CLASSD1 ] = 0xF7
527517
528518 elif module == MODULE_OMIX :
529-
530519 regs [_POWER3 ] = (
531520 _POWER3_LOMIX_MASK | _POWER3_ROMIX_MASK ,
532521 (_POWER3_LOMIX_MASK | _POWER3_ROMIX_MASK ) * is_enabled ,
533522 )
534523
535524 elif module == MODULE_MONO_OUT :
536-
537525 regs [_MONOMIX1 ] = regs [_MONOMIX2 ] = is_enabled << 7
538526 regs [_MONO ] = is_enabled << 6
539527
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