Updated review comments

jasminefrancisca · jasminefrancisca · commit edb3fa18f70c · 2022-04-07T23:19:40.000+05:30
diff --git a/dspic33e-clock-switch/.main-meta/main.json b/dspic33e-clock-switch/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Clock Switch",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-clock-switch/README.md b/dspic33e-clock-switch/README.md
@@ -8,7 +8,7 @@ In this example, CPU is initially configured to run from external secondary osc
 is initiated to run from Internal FRC.
 The RA4 pin toggles at frequency of 1/8th of system clock frequency.
 
-extern void clockSwitch(unsigned int r);
+extern void clockSwitch(unsigned int r);  
 This function selects the next clock input and initiates clock switch sequence.
 
 
@@ -20,6 +20,6 @@ This function selects the next clock input and initiates clock switch sequence.
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-crc-generation/.main-meta/main.json b/dspic33e-crc-generation/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"CRC Generation",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-crc-generation/README.md b/dspic33e-crc-generation/README.md
@@ -6,8 +6,7 @@
 
 In this code examples, CRC module is used to generate CRC for input data.
 
-
-CRC_Calc_ChecksumByte()
+CRC_Calc_ChecksumByte()  
 This function calculates the CRC Checksum for the array of bytes provided by the user based on the polynomial 
 set in the CRCXORH and CRCXORL registers
 
@@ -25,6 +24,6 @@ The CRC16 and CRC32 polynomials require 0x0000 to be loaded as the initial value
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-dma-trap/.main-meta/main.json b/dspic33e-dma-trap/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"DMA TRAP",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-dma-trap/README.md b/dspic33e-dma-trap/README.md
@@ -6,22 +6,22 @@
 
 DMA generates trap error in the following conditions.
 
-	DMA Write collision:
-	DMA write collision occurs when both DMA module and CPU tries to write 
-	to the same DMA RAM memory location.
+DMA Write collision:  
+DMA write collision occurs when both DMA module and CPU tries to write 
+to the same DMA RAM memory location.
 
-	Peripheral Write Collision:
-	Peripheral write collision occurs when both DMA module and CPU tries to write
-	to the same peripheral SFR. 
+Peripheral Write Collision:  
+Peripheral write collision occurs when both DMA module and CPU tries to write
+to the same peripheral SFR. 
 	
 In this code example, UART is configured to continuously transmit/receive data in loop-back mode. 
 In the back-ground loop, CPU tries to write to DMA RAM or peripheral SFR to create DMA trap condition.
 
 Select the required condition using the following macro in main.c function to generate DMA trap.
 
-// Source Selection for Trap Creation
-#define PER_WRITE_COL 1
-#define DMA_WRITE_COL 0
+// Source Selection for Trap Creation  
+#define PER_WRITE_COL 1  
+#define DMA_WRITE_COL 0  
 
 
 ## Hardware Used
@@ -32,6 +32,6 @@ Select the required condition using the following macro in main.c function to ge
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-doze-mode/.main-meta/main.json b/dspic33e-doze-mode/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"CPU In DOZE MODE",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-doze-mode/README.md b/dspic33e-doze-mode/README.md
@@ -8,7 +8,7 @@ In this example, CPU is setup in DOZE mode to run at 1/128 of the System Clock.
 Device is initially configured to run at Fcy=60Mhz and then DOZE mode is enabled to run the CPU at 468.75Khz (60M/128).
 Check the RA4 pin toggles i.e at a frequency of ~234khz.
 
-extern void setDozeRatio(unsigned int r);
+extern void setDozeRatio(unsigned int r);  
 This function sets the required DOZE ratio and enables the DOZE mode
 
 ## Hardware Used
@@ -19,6 +19,6 @@ This function sets the required DOZE ratio and enables the DOZE mode
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-flash-rtsp/.main-meta/main.json b/dspic33e-flash-rtsp/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Flash RTSP code example",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-flash-rtsp/README.md b/dspic33e-flash-rtsp/README.md
@@ -22,6 +22,6 @@ RTSP allows the user to program a ROW (128 instructions or 384 bytes) at a time
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-frc-tuning/.main-meta/main.json b/dspic33e-frc-tuning/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Dynamic tuning of Internal Fast RC Oscillator",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-frc-tuning/README.md b/dspic33e-frc-tuning/README.md
@@ -16,10 +16,10 @@ The TUN bits (4 or more in number) reside in the OSCCON register in Oscillator S
 In Oscillator System Version 3, the TUN bits are located in the OSCTUN register. The traps.c file contains 
 trap service routines (handlers) for hardware exceptions generated by the dsPIC33E device.
 
-The function in the tuneFrcOsc.c file has the following prototype:
+The function in the tuneFrcOsc.c file has the following prototype:  
 
-Function:       void  tuneFrcOsc(unsigned int )
-Input:          signed int data type equal in the range [-32,31]
+Function:       void  tuneFrcOsc(unsigned int )  
+Input:          signed int data type equal in the range [-32,31]  
 Description:    This subroutine writes to TUN bits which are present in the
                 OSCTUN register.
 
@@ -34,6 +34,6 @@ is provided in the device datasheets. It is usually 0.75% or 1.5% of the nominal
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-math-error-trap/.main-meta/main.json b/dspic33e-math-error-trap/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Math Error Traps for Robust Operation",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
@@ -26,7 +26,7 @@
          "content":{
             "metaDataVersion":"1.0.0",
             "category":"com.microchip.device",
-            "name":"DSPIC33EP512MU810",
+            "name":"dsPIC33EP512MU810",
             "versionRange":"*"
          }
       },
diff --git a/dspic33e-math-error-trap/README.md b/dspic33e-math-error-trap/README.md
@@ -10,17 +10,17 @@ automatic Math Error Trap detection.
 
 Math errors may be caused by one of the following:
 
-a. Divide by Zero
+1.Divide by Zero
 
-b. Accumulator A overflow (bit 31 destroyed)
+2.Accumulator A overflow (bit 31 destroyed)
 
-c. Accumulator B Overflow (bit 31 destroyed)
+3.Accumulator B Overflow (bit 31 destroyed)
 
-d. Catastrophic overflow of Accumulator A (bit 39 destroyed)
+4.Catastrophic overflow of Accumulator A (bit 39 destroyed)
 
-e. Catastrophic overflow of Accumulator B (bit 39 destroyed)
+5.Catastrophic overflow of Accumulator B (bit 39 destroyed)
 
-f. Accumulator Shift count error
+6.Accumulator Shift count error
 
 If the application defines an Math Error Trap service routine (trap handler), the processor will vector to the 
 trap handler when it detects a math error.
@@ -43,6 +43,6 @@ optimization level of 0 is assumed for this file.
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-open-drain/.main-meta/main.json b/dspic33e-open-drain/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Open Drain Configuration",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-open-drain/README.md b/dspic33e-open-drain/README.md
@@ -8,7 +8,8 @@ This code shows an example of setting the Open Drain Configuration for a generic
 The open-drain feature allows the generation of outputs higher than VDD
 (e.g., 5V on a 5V tolerant pin)by using external pull-up resistors.
 An external Pull up resistor should be connected for the port configured as
-open drain output.
+open drain output.  
+
 Open drain output is default high because of the external pull up resistor.
 In software the port configured as open drain is set to low during initialization
 and set as high when Switch S3 is pressed.
@@ -22,6 +23,6 @@ Refer ce419_i2c_eeprom code example for a peripheral configured as open drain ou
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-oscillator-error-trap/.main-meta/main.json b/dspic33e-oscillator-error-trap/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Oscillator failure traps and Fail-safe Clock Monitoring",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-oscillator-error-trap/README.md b/dspic33e-oscillator-error-trap/README.md
@@ -39,6 +39,6 @@ that cause a stack error trap to occur.
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 
diff --git a/dspic33e-sleep-wakeup/.main-meta/main.json b/dspic33e-sleep-wakeup/.main-meta/main.json
@@ -10,7 +10,7 @@
       "shortDescription":"Fast wake-up from SLEEP mode",
       "ide":{
          "name":"MPLABX",
-         "semverRange":">=5.50.0"
+         "semverRange":">=6.00"
       },
       "compiler":{
          "name":"XC16",
diff --git a/dspic33e-sleep-wakeup/README.md b/dspic33e-sleep-wakeup/README.md
@@ -32,6 +32,6 @@ option to wake-up from SLEEP in a short amount of time and execute code at the h
 	
 ## Software Used 
 
-- MPLAB� X IDE v5.50 or newer (https://www.microchip.com/mplabx)
-- MPLAB� XC16 v1.70 or newer (https://www.microchip.com/xc)
+- MPLAB� X IDE v6.00 or newer (https://www.microchip.com/mplabx)
+- MPLAB� XC16 v2.00 or newer (https://www.microchip.com/xc)
 

-Original file line number
+Diff line change
 ## Software Used
 -- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
 -- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
 +- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
 +- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)