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dspic33e-ptg-adc/README.md

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RC6 is toggled in ADC interrupt,and also in PTG Interrupt 0.This is done for understanding.Sample
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timing diagram is shown below.
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![image](../images/dspic33e-ptg-adc.jpg)
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![image](../images/dspic33e-ptg-adc.JPG)
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This can be reconfigured according to application requirement.
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dspic33e-pwm-oc-ptg/README.md

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And the OC1 and OC2 outputs are mapped to RP54,RP55 pin respectively.
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![image](../images/dspic33e-pwm-oc-ptg.jpg)
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![image](../images/dspic33e-pwm-oc-ptg.JPG)
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This can be reconfigured according to application requirement.
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dspic33e-spi-2slaves/README.md

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devices. The concept is that the GPIO are the slave selects for the individual devices, but the SCL, SDI and SDO are shared between the two processors.
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This is also scalable up to n devices, where your only limitation is the bus bandwidth on the SPI bus and the number of GPIO lines at your disposal.
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![image](../images/dspic33e-spi-2slaves.jpg)
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![image](../images/dspic33e-spi-2slaves.JPG)
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The code alternates between sending data from one device to another and mixed.
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dspic33e-spi-framed/README.md

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This code shows an example of running the SPI module in different modes. The first mode is for outputting to a
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single device which requires a Framed SPI mode.
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![image](../images/dspic33e-spi-framed-1.jpg)
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![image](../images/dspic33e-spi-framed-1.JPG)
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The second example is for a device which can accept a string of clocks,
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but will only respond to the byte after the frame bit.
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![image](../images/dspic33e-spi-framed-2.jpg)
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![image](../images/dspic33e-spi-framed-2.JPG)
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The code also goes through the 4 combinations of CKP and CKE.
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dspic33e-spi-no-dma/README.md

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This code example shows using a single SPI module in conjunction with a GPIO to generate an SPI communication that will work with most SPI Slave devices.
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![image](../images/dspic33e-spi-no-dma.jpg)
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![image](../images/dspic33e-spi-no-dma.JPG)
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The code sends from 00h through FFh and then cycles through again. A delay was added to permit catching the output on a logic analyzer easier.
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