Skip to content

Commit 4f4cf95

Browse files
CITD-425:code-examples
1 parent e567cf4 commit 4f4cf95

File tree

10 files changed

+1648
-10
lines changed

10 files changed

+1648
-10
lines changed

dspic33e-flash-rtsp/.main-meta/main.json

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,11 @@
33
"category":"com.microchip.ide.project",
44
"content":{
55
"metaDataVersion":"1.3.0",
6-
"name":"com.microchip.mplabx.project.dspic33e-clock-switch",
6+
"name":"com.microchip.mplabx.project.dspic33e-flash-rtsp",
77
"version":"0.1.0",
8-
"displayName":"Clock Switch",
9-
"projectName":"dspic33e-clock-switch",
10-
"shortDescription":"Clock Switch",
8+
"displayName":"Flash RTSP code example",
9+
"projectName":"dspic33e-flash-rtsp",
10+
"shortDescription":"Flash RTSP code example",
1111
"ide":{
1212
"name":"MPLABX",
1313
"semverRange":">=5.50.0"
@@ -33,6 +33,7 @@
3333
"peripherals":[
3434
],
3535
"keywords":[
36+
"Flash"
3637
]
3738
}
3839
}

dspic33e-flash-rtsp/README.md

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,17 @@
11
![image](../images/microchip.jpg)
22

3-
## Clock Switch
3+
## FLASH RTSP CODE EXAMPLE
44

55
## Description:
66

7-
In this example, CPU is initially configured to run from external secondary osc and then clock switching
8-
is initiated to run from Internal FRC.
9-
The RA4 pin toggles at frequency of 1/8th of system clock frequency.
7+
In this code example for dsp33ep512mu810, a page of Flash memory (1024 instructions or 8 rows of 128 instruction) is read first.
8+
Then the page is erased fully. One row of the page is modified and written back to the flash.
109

11-
extern void clockSwitch(unsigned int r);
12-
This function selects the next clock input and initiates clock switch sequence.
10+
Following RTSP Application Program Interface (APIs) are used to perform the operation.
11+
12+
Flash Memory is organised into ROWs of 128 instructions or 384 bytes
13+
RTSP allows the user to erase a PAGE of memory which consists of EIGHT ROWs (1024 instructions or 3072 bytes) at a time.
14+
RTSP allows the user to program a ROW (128 instructions or 384 bytes) at a time
1315

1416

1517
## Hardware Used
Lines changed: 157 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,157 @@
1+
/*******************************************************************************
2+
ce409 RTSP API header file
3+
4+
Company:
5+
Microchip Technology Inc.
6+
7+
File Name:
8+
rtspapi.h
9+
10+
Summary:
11+
Flash API function definitions.
12+
13+
Description:
14+
This file consists of the definitions for the Flash erase,
15+
Flash read, Flash page modify and the Flash program fucntions
16+
that are called in the main.c.
17+
*******************************************************************************/
18+
/*******************************************************************************
19+
Copyright (c) 2012 released Microchip Technology Inc. All rights reserved.
20+
21+
Microchip licenses to you the right to use, modify, copy and distribute
22+
Software only when embedded on a Microchip microcontroller or digital signal
23+
controller that is integrated into your product or third party product
24+
(pursuant to the sublicense terms in the accompanying license agreement).
25+
26+
You should refer to the license agreement accompanying this Software for
27+
additional information regarding your rights and obligations.
28+
29+
SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND,
30+
EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF
31+
MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE.
32+
IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER
33+
CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR
34+
OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
35+
INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR
36+
CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF
37+
SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
38+
(INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.
39+
*******************************************************************************/
40+
#ifndef __RTSPAPI_H__
41+
#define __RTSPAPI_H__
42+
43+
// *****************************************************************************
44+
// *****************************************************************************
45+
// Section: Included Files
46+
// *****************************************************************************
47+
// *****************************************************************************
48+
#include <stdint.h>
49+
#include <xc.h>
50+
51+
#ifdef __cplusplus // Provide C++ Compatability
52+
extern "C"
53+
{
54+
#endif
55+
56+
// *****************************************************************************
57+
// *****************************************************************************
58+
// Section: Interface Routines
59+
// *****************************************************************************
60+
// *****************************************************************************
61+
/* Flash Memory is organised into ROWs of 128 instructions or 256 bytes.
62+
RTSP allows the user to erage a PAGE of memory which consists of EIGHT ROWs
63+
(512 instructions or 1024byts) at a time.
64+
RTSP allows the user to program a ROW (128 instructions or 192 bytes) at a
65+
time
66+
*/
67+
// *****************************************************************************
68+
/******************************************************************************
69+
* Function: int16_t FlashPageErase(uint16_t nvmAdru, uint16_t nvmAdr)
70+
*
71+
* PreCondition: None
72+
*
73+
* Input: nvmAdru - Selects the upper 8bits of the location to program or erase
74+
* in program flash memory
75+
* nvmAdr - Selects the location to program or erase in program flash
76+
* memory. It must be aligned to 512 instruction boundary,
77+
* LSB 10bits of address must be zero
78+
*
79+
* Output: returns ERROREE (or -1), if it is not successful,
80+
* returns ZERO, if successful
81+
*
82+
* Overview: This function provides the interface to erase the flash.
83+
*
84+
*******************************************************************************/
85+
int16_t FlashPageErase( uint16_t nvmAdru, uint16_t nvmAdr );
86+
87+
/******************************************************************************
88+
* Function:int16_t FlashPageRead(uint16_t nvmAdru, uint16_t nvmAdr, int16_t *pageBufPtr);
89+
*
90+
* PreCondition: None
91+
*
92+
* Input: nvmAdru - Selects the upper 8bits of the location to program or erase
93+
* in program flash memory
94+
* nvmAdr - Selects the location to program or erase in program flash
95+
* memory. It must be aligned to 512 instruction boundary,
96+
* LSB 10bits of address must be zero
97+
* pageBufPtr - Pointer to the data array in which read data will be stored
98+
*
99+
* Output: returns ERROREE (or -1), if it is not successful,
100+
* returns ZERO, if successful
101+
*
102+
* Overview: This function provides the interface to read the flash.
103+
*
104+
*******************************************************************************/
105+
int16_t FlashPageRead( uint16_t nvmAdru, uint16_t nvmAdr, int16_t *pageBufPtr );
106+
107+
/******************************************************************************
108+
* Function: int16_t FlashPageModify(uint16_t row, uint16_t size,
109+
* int16_t *rowBuf, int16_t *pageBufPtr)
110+
*
111+
* PreCondition: None
112+
*
113+
* Input: nvmAdru - Selects the upper 8bits of the location to program or erase
114+
* in program flash memory
115+
* nvmAdr - Selects the location to program or erase in program flash
116+
* memory. It must be aligned to 512 instruction boundary,
117+
* LSB 10bits of address must be zero
118+
* rowBuf - Selects the location to read in program flash memory
119+
* pageBufPtr - Pointer to the data array in which read data will be stored
120+
*
121+
* Output: returns ERROREE (or -1), if it is not successful,
122+
* returns ZERO, if successful
123+
*
124+
* Overview: This function provides the interface to read the flash.
125+
*
126+
*******************************************************************************/
127+
int16_t FlashPageModify( uint16_t row, uint16_t size, int16_t *rowBuf, int16_t *pageBufPtr );
128+
129+
/******************************************************************************
130+
* Function:int16_t FlashPageWrite(uint16_t nvmAdru, uint16_t nvmAdr, int16_t *pageBufPtr)
131+
*
132+
* PreCondition: None
133+
*
134+
* Input: nvmAdru - Selects the upper 8bits of the location to program or erase
135+
* in program flash memory
136+
* nvmAdr - Selects the location to program or erase in program flash
137+
* memory. It must be aligned to 512 instruction boundary,
138+
* LSB 10bits of address must be zero
139+
* pageBufPtr - Pointer to the data array from which data will be written
140+
*
141+
* Output: returns ERROREE (or -1), if it is not successful,
142+
* returns ZERO, if successful
143+
*
144+
* Overview: This function provides the interface to write the flash.
145+
*
146+
*******************************************************************************/
147+
int16_t FlashPageWrite( uint16_t nvmAdru, uint16_t nvmAdr, int16_t *pageBufPtr );
148+
149+
#ifdef __cplusplus // Provide C++ Compatibility
150+
}
151+
152+
#endif
153+
#endif /* _RTSPAPI_H */
154+
155+
/*******************************************************************************
156+
End of File
157+
*/

0 commit comments

Comments
 (0)