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Pull request #32: Feature/MCU16GITHUB-937 see about maxing out the clock speed of the device for the demo 2
Merge in MCU16CE/dspic33-dsc-bootloader-code-examples from ~C12109/dspic33-dsc-bootloader-code-examples:feature/MCU16GITHUB-937-see-about-maxing-out-the-clock-speed-of-the-device-for-the-demo-2 to develop Squashed commit of the following: commit 0c0625d765b0a24cd9abe7c350e7a97434bd598b Author: David Flowers <david.flowers@microchip.com> Date: Wed Mar 20 10:57:02 2024 -0400 remove the CAL files from project. commit d67c24e442b134b262c72df6b2ed81ff509173c4 Author: David Flowers <david.flowers@microchip.com> Date: Wed Mar 20 10:45:01 2024 -0400 fix double post-build include. commit 182b8ca4a64f9d253021c1988b78c10325eb1d92 Author: David Flowers <david.flowers@microchip.com> Date: Wed Mar 20 10:39:22 2024 -0400 update to put chmod first. commit 777396d6f74e67b55fd2b45e1557b4e75a552dc2 Author: David Flowers <david.flowers@microchip.com> Date: Wed Mar 20 10:36:02 2024 -0400 Update to faster clock speed.
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15 files changed

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15 files changed

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secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/app.mc3

Lines changed: 5 additions & 5 deletions
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secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/main.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,13 +25,15 @@
2525
Main application
2626
*/
2727

28+
#define BLINK_DELAY_COUNT 0x80000UL
29+
2830
int main(void) {
29-
unsigned int counter = 0;
31+
uint32_t counter = 0;
3032

3133
SYSTEM_Initialize();
3234

3335
while (1) {
34-
if ((counter++ % 0x8000) == 0) {
36+
if ((counter++ % BLINK_DELAY_COUNT) == 0) {
3537
IO_RE9_Toggle();
3638
}
3739
}

secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/mcc_generated_files/system/clock.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@
4747
@brief This macro is used to read the System clock (FOSC) Frequency configured in
4848
the MCC Melody User Interface
4949
*/
50-
#define CLOCK_SystemFrequencyGet() (8000000UL)
50+
#define CLOCK_SystemFrequencyGet() (200000000UL)
5151

5252
/**
5353
@ingroup clockdriver

secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/mcc_generated_files/system/src/clock.c

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -44,21 +44,25 @@ void CLOCK_Initialize(void)
4444
{
4545
/*
4646
Input frequency : 8.00 MHz
47-
Clock source : FRC Oscillator
48-
System frequency (Fosc) : 8.00 MHz
49-
Clock switching enabled : false
47+
Clock source : External Oscillator with PLL
48+
System frequency (Fosc) : 200.00 MHz [(8.00 MHz / 1) * 50 / 1 / 2 = 200.00 MHz]
49+
PLL VCO frequency (Fvco) : 400.00 MHz [(8.00 MHz / 1) * 50 = 400.00 MHz]
50+
PLL output frequency (Fpllo) : 400.00 MHz [(8.00 MHz / 1) * 50 / 1 = 400.00 MHz]
51+
PLL VCO divider frequency (Fvcodiv) : 100.00 MHz [400.00 MHz / 4 = 100.00 MHz]
52+
Clock switching enabled : true
53+
Clock source when device boots : FRC Oscillator
5054
Auxiliary clock source : FRC Oscillator
5155
Auxiliary clock input frequency : 8.00 MHz
5256
Auxiliary clock PLL output frequency (AFpllo) : 8.00 MHz
5357
*/
5458
// RCDIV FRC/1; PLLPRE 1:1; DOZE 1:8; DOZEN disabled; ROI disabled;
5559
CLKDIV = 0x3001;
56-
// PLLDIV 150;
57-
PLLFBD = 0x96;
60+
// PLLDIV 50;
61+
PLLFBD = 0x32;
5862
// TUN Center frequency;
5963
OSCTUN = 0x0;
60-
// PLLPOST 1:4; VCODIV FVCO/4; POST2DIV 1:1;
61-
PLLDIV = 0x41;
64+
// PLLPOST 1:1; VCODIV FVCO/4; POST2DIV 1:1;
65+
PLLDIV = 0x11;
6266
// ENAPLL disabled; FRCSEL FRC Oscillator; APLLPRE 1:1;
6367
ACLKCON1 = 0x101;
6468
// APLLFBDIV 150;
@@ -91,9 +95,12 @@ void CLOCK_Initialize(void)
9195
PMD7 = 0x0;
9296
// DMTMD enabled; CLC3MD enabled; OPAMPMD enabled; BIASMD enabled; CLC4MD enabled; SENT1MD enabled; CLC1MD enabled; CLC2MD enabled; SENT2MD enabled;
9397
PMD8 = 0x0;
94-
// CF no clock failure; NOSC FRC; CLKLOCK unlocked; OSWEN Switch is Complete;
95-
__builtin_write_OSCCONH((uint8_t) (0x00));
96-
__builtin_write_OSCCONL((uint8_t) (0x00));
98+
// CF no clock failure; NOSC PRIPLL; CLKLOCK unlocked; OSWEN Switch is Complete;
99+
__builtin_write_OSCCONH((uint8_t) (0x03));
100+
__builtin_write_OSCCONL((uint8_t) (0x01));
101+
// Wait for Clock switch to occur
102+
while (OSCCONbits.OSWEN != 0);
103+
while (OSCCONbits.LOCK != 1);
97104
}
98105

99106
bool CLOCK_AuxPllLockStatusGet(void)

secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/mcc_generated_files/system/src/config_bits.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -55,9 +55,9 @@
5555
#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
5656

5757
// FOSC
58-
#pragma config POSCMD = NONE //Primary Oscillator Mode Select bits->Primary Oscillator disabled
58+
#pragma config POSCMD = EC //Primary Oscillator Mode Select bits->EC (External Clock) Mode
5959
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
60-
#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
60+
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6161
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
6262
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
6363
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start

secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/mcc_generated_files/system/src/pins.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ void PINS_Initialize(void)
9898
* Setting the Analog/Digital Configuration SFR(s)
9999
***************************************************************************/
100100
ANSELA = 0x001F;
101-
ANSELB = 0x009F;
101+
ANSELB = 0x009E;
102102
ANSELC = 0x00CF;
103103
ANSELD = 0x2C00;
104104
ANSELE = 0x000F;

secure_boot_and_secure_firmware_upgrade_over_canfd/app.X/nbproject/configurations.xml

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,20 @@
2525
</logicalFolder>
2626
</logicalFolder>
2727
</logicalFolder>
28+
<logicalFolder name="ExternalFiles"
29+
displayName="Important Files"
30+
projectFiles="true">
31+
<logicalFolder name="MCC Generated Files"
32+
displayName="MCC Generated Files"
33+
projectFiles="true">
34+
<logicalFolder name="boot" displayName="boot" projectFiles="true">
35+
<itemPath>mcc_generated_files/boot/postBuild.bat</itemPath>
36+
<itemPath>mcc_generated_files/boot/combineAppAndBootloaderHex.bat</itemPath>
37+
</logicalFolder>
38+
</logicalFolder>
39+
<itemPath>Makefile</itemPath>
40+
<itemPath>app.mc3</itemPath>
41+
</logicalFolder>
2842
<logicalFolder name="LinkerScript"
2943
displayName="Linker Files"
3044
projectFiles="true">
@@ -60,20 +74,6 @@
6074
</logicalFolder>
6175
<itemPath>main.c</itemPath>
6276
</logicalFolder>
63-
<logicalFolder name="ExternalFiles"
64-
displayName="Important Files"
65-
projectFiles="false">
66-
<logicalFolder name="MCC Generated Files"
67-
displayName="MCC Generated Files"
68-
projectFiles="true">
69-
<logicalFolder name="boot" displayName="boot" projectFiles="true">
70-
<itemPath>mcc_generated_files/boot/postBuild.bat</itemPath>
71-
<itemPath>mcc_generated_files/boot/combineAppAndBootloaderHex.bat</itemPath>
72-
</logicalFolder>
73-
</logicalFolder>
74-
<itemPath>Makefile</itemPath>
75-
<itemPath>app.mc3</itemPath>
76-
</logicalFolder>
7777
</logicalFolder>
7878
<projectmakefile>Makefile</projectmakefile>
7979
<confs>
@@ -113,7 +113,7 @@
113113
<makeUseCleanTarget>false</makeUseCleanTarget>
114114
<makeCustomizationPreStep></makeCustomizationPreStep>
115115
<makeCustomizationPostStepEnabled>true</makeCustomizationPostStepEnabled>
116-
<makeCustomizationPostStep>cd mcc_generated_files/boot &amp;&amp; chmod +x postBuild$(ShExtension) &amp;&amp; .$(_/_)postBuild$(ShExtension) $(MP_CC_DIR) ${ProjectDir} ${ImageDir} ${ImageName} ${IsDebug}</makeCustomizationPostStep>
116+
<makeCustomizationPostStep>chmod +x mcc_generated_files/boot/postBuild$(ShExtension) &amp;&amp; cd mcc_generated_files/boot &amp;&amp; .$(_/_)postBuild$(ShExtension) $(MP_CC_DIR) ${ProjectDir} ${ImageDir} ${ImageName} ${IsDebug}</makeCustomizationPostStep>
117117
<makeCustomizationPutChecksumInUserID>false</makeCustomizationPutChecksumInUserID>
118118
<makeCustomizationEnableLongLines>false</makeCustomizationEnableLongLines>
119119
<makeCustomizationNormalizeHexFile>false</makeCustomizationNormalizeHexFile>

secure_boot_and_secure_firmware_upgrade_over_canfd/boot.X/boot.mc3

Lines changed: 7 additions & 7 deletions
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secure_boot_and_secure_firmware_upgrade_over_canfd/boot.X/mcc_generated_files/boot/contract.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1184,7 +1184,7 @@
11841184
"privateKeyPath": "private_key.pem",
11851185
"secureElementStorage": {}
11861186
},
1187-
"bootloaderFoscValue": 4000000,
1187+
"bootloaderFoscValue": 100000000,
11881188
"isCodeProtectEnabled": true,
11891189
"isAntiRollBackEnabled": true,
11901190
"downloadStartAddress": 372736,

secure_boot_and_secure_firmware_upgrade_over_canfd/boot.X/mcc_generated_files/spi_host/src/spi1.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,7 @@ static const struct SPI1_HOST_CONFIG config[] = {
8181
{
8282
/*Configuration setting for CrytoAuthenticationLibrary.
8383
SPI Mode : Mode 0, Sampled at : Middle, Clock Frequency : 1000 kHz*/
84-
0x1,//SPI1BRGL
84+
0x31,//SPI1BRGL
8585
0x121,//SPI1CON1L
8686
},
8787
};

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