migrate from asm to llvm_asm rust-lang/rfcs#2843

tjhu · tjhu · commit 6481d2957bda · 2020-05-28T20:37:03.000-05:00
diff --git a/lib/pcid/src/lib.rs b/lib/pcid/src/lib.rs
@@ -2,7 +2,9 @@
 #![crate_name = "pcid"]
 #![crate_type = "lib"]
 
-#![feature( asm)]
+#![feature(
+    llvm_asm,
+)]
 
 #[macro_use] extern crate bitflags;
 extern crate byteorder;
diff --git a/lib/pcid/src/pci.rs b/lib/pcid/src/pci.rs
@@ -20,7 +20,7 @@ impl Pci {
     pub unsafe fn read(&self, bus: u8, dev: u8, func: u8, offset: u8) -> u32 {
         let address = 0x80000000 | ((bus as u32) << 16) | ((dev as u32) << 11) | ((func as u32) << 8) | ((offset as u32) & 0xFC);
         let value: u32;
-        asm!("mov dx, 0xCF8
+        llvm_asm!("mov dx, 0xCF8
               out dx, eax
               mov dx, 0xCFC
               in eax, dx"
@@ -31,10 +31,10 @@ impl Pci {
     #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
     pub unsafe fn write(&self, bus: u8, dev: u8, func: u8, offset: u8, value: u32) {
         let address = 0x80000000 | ((bus as u32) << 16) | ((dev as u32) << 11) | ((func as u32) << 8) | ((offset as u32) & 0xFC);
-        asm!("mov dx, 0xCF8
+        llvm_asm!("mov dx, 0xCF8
               out dx, eax"
              : : "{eax}"(address) : "dx" : "intel", "volatile");
-        asm!("mov dx, 0xCFC
+        llvm_asm!("mov dx, 0xCFC
               out dx, eax"
              : : "{eax}"(value) : "dx" : "intel", "volatile");
     }
diff --git a/src/gdt.rs b/src/gdt.rs
@@ -235,7 +235,7 @@ pub unsafe fn init_global_gdt() {
 
 #[inline]
 pub unsafe fn writefs(fs: u64) {
-    asm!("wrfsbase $0" :: "r"(fs) :: "volatile");
+    llvm_asm!("wrfsbase $0" :: "r"(fs) :: "volatile");
 }
 
 /// Initialize GDT with TLS
diff --git a/src/interrupt/mod.rs b/src/interrupt/mod.rs
@@ -165,7 +165,7 @@ pub unsafe fn init_cpu(cpu: u32, stack: u32, code: u64) {
     let destination: *mut u8 = 0x7000 as *mut u8;
 
     let mut pgdir: u64;
-    asm!("mov $0, cr3" : "=r"(pgdir) ::: "intel");
+    llvm_asm!("mov $0, cr3" : "=r"(pgdir) ::: "intel");
 
     entryother::copy_binary_to(destination);
     entryother::init_args(destination, stack, pgdir as u32, code);
diff --git a/src/lib.rs b/src/lib.rs
@@ -1,7 +1,6 @@
 #![no_std]
 #![feature(abi_x86_interrupt)]
 #![feature(
-    asm,
     allocator_api,
     alloc_layout_extra,
     alloc_error_handler,
diff --git a/src/redsys/resources/io_port.rs b/src/redsys/resources/io_port.rs
@@ -60,7 +60,7 @@ impl IOPort {
             Err("Policy forbids writing to port")
         } else {
             unsafe {
-                asm!("cld; rep; outsd"
+                llvm_asm!("cld; rep; outsd"
                      : // output
                      : "{dx}"(self._port), "{esi}"(val as *const _ as *const () as usize), "{ecx}"(val.len() as u32) // input
                      : // clobber
@@ -77,7 +77,7 @@ impl IOPort {
             Err("Policy forbids reading from port")
         } else {
             unsafe {
-                asm!("cld; rep; insd"
+                llvm_asm!("cld; rep; insd"
                      : "={esi}"(val as *const _ as *const () as usize) // output
                      : "{dx}"(self._port), "{ecx}"(val.len() as u32) // input
                      : // clobber
diff --git a/src/thread.rs b/src/thread.rs
@@ -543,7 +543,7 @@ extern "C" fn die(/*func: extern fn()*/) {
 
     /* AB: XXX: We assume that the funciton pointer is still in r15 */
     unsafe{
-        asm!("mov $0, r15" : "=r"(func) : : "memory" : "intel", "volatile");
+        llvm_asm!("mov $0, r15" : "=r"(func) : : "memory" : "intel", "volatile");
     };
 
     println!("Starting new thread"); 
@@ -565,42 +565,42 @@ extern "C" fn die(/*func: extern fn()*/) {
 #[inline(never)]
 #[naked]
 pub unsafe fn switch(prev: *mut Thread, next: *mut Thread) {
-    //asm!("fxsave64 [$0]" : : "r"(self.fx) : "memory" : "intel", "volatile");
+    //llvm_asm!("fxsave64 [$0]" : : "r"(self.fx) : "memory" : "intel", "volatile");
     //self.loadable = true;
     //if next.loadable {
-    //    asm!("fxrstor64 [$0]" : : "r"(next.fx) : "memory" : "intel", "volatile");
+    //    llvm_asm!("fxrstor64 [$0]" : : "r"(next.fx) : "memory" : "intel", "volatile");
     //}else{
-    //    asm!("fninit" : : : "memory" : "intel", "volatile");
+    //    llvm_asm!("fninit" : : : "memory" : "intel", "volatile");
     //}
 
-    //asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
+    //llvm_asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
     //if next.cr3 != self.cr3 {
-    //    asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
+    //    llvm_asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
     //}
 
-    asm!("pushfq ; pop $0" : "=r"((*prev).context.rflags) : : "memory" : "intel", "volatile");
-    asm!("push $0 ; popfq" : : "r"((*next).context.rflags) : "memory" : "intel", "volatile");
+    llvm_asm!("pushfq ; pop $0" : "=r"((*prev).context.rflags) : : "memory" : "intel", "volatile");
+    llvm_asm!("push $0 ; popfq" : : "r"((*next).context.rflags) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, rbx" : "=r"((*prev).context.rbx) : : "memory" : "intel", "volatile");
-    asm!("mov rbx, $0" : : "r"((*next).context.rbx) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, rbx" : "=r"((*prev).context.rbx) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov rbx, $0" : : "r"((*next).context.rbx) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, r12" : "=r"((*prev).context.r12) : : "memory" : "intel", "volatile");
-    asm!("mov r12, $0" : : "r"((*next).context.r12) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, r12" : "=r"((*prev).context.r12) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov r12, $0" : : "r"((*next).context.r12) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, r13" : "=r"((*prev).context.r13) : : "memory" : "intel", "volatile");
-    asm!("mov r13, $0" : : "r"((*next).context.r13) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, r13" : "=r"((*prev).context.r13) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov r13, $0" : : "r"((*next).context.r13) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, r14" : "=r"((*prev).context.r14) : : "memory" : "intel", "volatile");
-    asm!("mov r14, $0" : : "r"((*next).context.r14) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, r14" : "=r"((*prev).context.r14) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov r14, $0" : : "r"((*next).context.r14) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, r15" : "=r"((*prev).context.r15) : : "memory" : "intel", "volatile");
-    asm!("mov r15, $0" : : "r"((*next).context.r15) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, r15" : "=r"((*prev).context.r15) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov r15, $0" : : "r"((*next).context.r15) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, rsp" : "=r"((*prev).context.rsp) : : "memory" : "intel", "volatile");
-    asm!("mov rsp, $0" : : "r"((*next).context.rsp) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, rsp" : "=r"((*prev).context.rsp) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov rsp, $0" : : "r"((*next).context.rsp) : "memory" : "intel", "volatile");
 
-    asm!("mov $0, rbp" : "=r"((*prev).context.rbp) : : "memory" : "intel", "volatile");
-    asm!("mov rbp, $0" : : "r"((*next).context.rbp) : "memory" : "intel", "volatile");
+    llvm_asm!("mov $0, rbp" : "=r"((*prev).context.rbp) : : "memory" : "intel", "volatile");
+    llvm_asm!("mov rbp, $0" : : "r"((*next).context.rbp) : "memory" : "intel", "volatile");
 }
 
 //fn set_idle(t: Arc<Mutex<Thread>>) {
diff --git a/sys/interfaces/device/nvme/src/lib.rs b/sys/interfaces/device/nvme/src/lib.rs
@@ -1,6 +1,6 @@
 #![no_std]
 #![feature(
-    asm,
+    llvm_asm,
     core_intrinsics,
 )]
 mod nvme_cmd;
diff --git a/sys/interfaces/device/nvme/src/queue.rs b/sys/interfaces/device/nvme/src/queue.rs
@@ -407,7 +407,7 @@ impl NvmeCompletionQueue {
             if let Some(some) = self.complete() {
                 return some;
             } else {
-                unsafe { asm!("pause"); }
+                unsafe { llvm_asm!("pause"); }
             }
         }
     }
diff --git a/sys/interfaces/device/pcidevice/src/lib.rs b/sys/interfaces/device/pcidevice/src/lib.rs
@@ -1,8 +1,8 @@
 #![no_std]
 #![feature(
-    asm,
+    llvm_asm,
     allocator_api,
-    )]
+)]
 
 #[macro_use]
 extern crate bitflags;
@@ -188,7 +188,7 @@ fn pci_read(pci: &PciAddress, offset: u8) -> u32 {
     let address = 0x80000000 | ((pci.bus as u32) << 16) | ((pci.dev as u32) << 11) | ((pci.func as u32) << 8) | ((offset as u32) & 0xFC);
     let value: u32;
     unsafe {
-        asm!("mov dx, $2
+        llvm_asm!("mov dx, $2
           out dx, eax
           mov dx, $3
           in eax, dx"
@@ -201,10 +201,10 @@ fn pci_write(pci: &PciAddress, offset: u8, value: u32) {
     let address = 0x80000000 | ((pci.bus as u32) << 16) | ((pci.dev as u32) << 11) | ((pci.func as u32) << 8) | ((offset as u32) & 0xFC);
 
     unsafe {
-        asm!("mov dx, $1
+        llvm_asm!("mov dx, $1
           out dx, eax"
           : : "{eax}"(address), "r"(PCI_ADDR_PORT) : "dx" : "intel", "volatile");
-        asm!("mov dx, $1
+        llvm_asm!("mov dx, $1
           out dx, eax"
           : : "{eax}"(value), "r"(PCI_DATA_PORT) : "dx" : "intel", "volatile");
     }

Original file line number	Diff line number	Diff line change
`@@ -235,7 +235,7 @@ pub unsafe fn init_global_gdt() {`
`235`	`235`
`236`	`236`	`#[inline]`
`237`	`237`	`pub unsafe fn writefs(fs: u64) {`
`238`		`- asm!("wrfsbase $0" :: "r"(fs) :: "volatile");`
	`238`	`+ llvm_asm!("wrfsbase $0" :: "r"(fs) :: "volatile");`
`239`	`239`	`}`
`240`	`240`
`241`	`241`	`/// Initialize GDT with TLS`
Original file line number	Diff line number	Diff line change
`@@ -407,7 +407,7 @@ impl NvmeCompletionQueue {`
`407`	`407`	`if let Some(some) = self.complete() {`
`408`	`408`	`return some;`
`409`	`409`	`} else {`
`410`		`- unsafe { asm!("pause"); }`
	`410`	`+ unsafe { llvm_asm!("pause"); }`
`411`	`411`	`}`
`412`	`412`	`}`
`413`	`413`	`}`