Change framebuffer master bus to f2h_sdram (uboot needs to take the port out of reset via: mw.w 0xffc25080 0x0303;)

And update qsys system to reflect the DE0 pandant

Signed-off-by: Michael Brown <producer@holotronic.dk>

Author: the-snowwhite

HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/DE10_Nano_SoC_FB_DB25.vhd

@@ -298,7 +298,7 @@ begin
 --      axi_str_data                            => out_data[7:0],           --                    stream_port.data
 --      axi_str_valid                           => out_data[8],             --                               .valid
 --      axi_str_ready                           => ar_in_sig[1])            --                               .ready
-        alt_vip_itc_0_clocked_video_vid_clk       => lcd_clk,           -- alt_vip_itc_0_clocked_video.vid_clk
+        alt_vip_itc_0_clocked_video_vid_clk     => lcd_clk,           -- alt_vip_itc_0_clocked_video.vid_clk
         alt_vip_itc_0_clocked_video_vid_data (23 downto 0)     => HDMI_TX_D,             --                            .vid_data
 --      alt_vip_itc_0_clocked_video_underflow     => CONNECTED_TO_alt_vip_itc_0_clocked_video_underflow,     --                            .underflow
         alt_vip_itc_0_clocked_video_vid_datavalid => HDMI_TX_DE,            --                            .vid_datavalid