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cdsteinkuehlercdsteinkuehler
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Merge pull request #92 from the-snowwhite/DE10_Nano_upd
Late Fix for package building errors, introduced in january
2 parents 7e81953 + baa2c9c commit 7ec2eff

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7 files changed

+21
-267
lines changed

7 files changed

+21
-267
lines changed

‎HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.qsf‎

Lines changed: 2 additions & 189 deletions
Large diffs are not rendered by default.

‎HW/QuartusProjects/DE0_Nano_SoC_Cramps/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@ AR_REGEX += \
120120
Makefile ip readme.txt ds5 \
121121
altera_avalon* *.qpf *.qsf *.sdc *.v *.sv *.vhd *.qsys *.tcl *.stp \
122122
*.sed quartus.ini *.sof *.rbf *.sopcinfo *.jdi output_files \
123-
hps_isw_handoff */*.svd */synthesis/*.svd *.dts *.dtb *.xml *.sh *.ipx *.in *.mif\
123+
hps_isw_handoff */*.svd */synthesis/*.svd *.dts *.dtb *.xml *.sh *.ipx *.in *.mif *.qip\
124124
$(SOFTWARE_DIR)
125125

126126
AR_FILTER_OUT += %_tb.qsys

‎HW/QuartusProjects/DE10_Nano_FB_Cramps/DE10_Nano_FB_Cramps.sv‎

Lines changed: 2 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -117,15 +117,15 @@ parameter NumIOAddrReg = 6;
117117
wire hps_cold_reset;
118118
wire hps_warm_reset;
119119
wire hps_debug_reset;
120-
wire [27:0] stm_hw_events;
120+
// wire [27:0] stm_hw_events;
121121
wire fpga_clk_50;
122122
wire clk_75;
123123

124124
// connection of internal logics
125125
// assign LED[5:1] = fpga_led_internal | {7'b0000000, led_level};
126126
assign LED[5:1] = fpga_led_internal;
127127
assign fpga_clk_50=FPGA_CLK1_50;
128-
assign stm_hw_events = {{15{1'b0}}, SW, fpga_led_internal, fpga_debounced_buttons};
128+
// assign stm_hw_events = {{15{1'b0}}, SW, fpga_led_internal, fpga_debounced_buttons};
129129
// hm2
130130
wire [AddrWidth-1:2] hm_address;
131131
wire [31:0] hm_datao;
@@ -261,10 +261,6 @@ soc_system u0 (
261261
.dipsw_pio_external_connection_export ( SW ), // dipsw_pio_external_connection.export
262262
.button_pio_external_connection_export ( fpga_debounced_buttons ), // button_pio_external_connection.export
263263
.hps_0_h2f_reset_reset_n ( hps_fpga_reset_n ), // hps_0_h2f_reset.reset_n
264-
.hps_0_f2h_cold_reset_req_reset_n (~hps_cold_reset ), // hps_0_f2h_cold_reset_req.reset_n
265-
.hps_0_f2h_debug_reset_req_reset_n (~hps_debug_reset ), // hps_0_f2h_debug_reset_req.reset_n
266-
.hps_0_f2h_stm_hw_events_stm_hwevents (stm_hw_events ), // hps_0_f2h_stm_hw_events.stm_hwevents
267-
.hps_0_f2h_warm_reset_req_reset_n (~hps_warm_reset ), // hps_0_f2h_warm_reset_req.reset_n
268264
// hm2reg_io_0_conduit
269265
.mk_io_hm2_datain (busdata_out), // .hm2_datain
270266
.mk_io_hm2_dataout (hm_datai), // hm2reg.hm2_dataout
@@ -284,31 +280,24 @@ top_io_modules top_io_modules_inst
284280
.reset_n(hps_fpga_reset_n) , // input reset_n_sig
285281
.button_in(KEY) , // input [KEY_WIDTH-1:0] button_in_sig
286282
.button_out(fpga_debounced_buttons) , // output [KEY_WIDTH-1:0] button_out_sig
287-
.hps_cold_reset(hps_cold_reset) , // output hps_cold_reset_sig
288-
.hps_warm_reset(hps_warm_reset) , // output hps_warm_reset_sig
289-
.hps_debug_reset(hps_debug_reset) , // output hps_debug_reset_sig
290283
.LED(LED[0]) // output LED_sig
291284
);
292285

293286
defparam top_io_modules_inst.KEY_WIDTH = 2;
294287

295288
// Mesa code ------------------------------------------------------//
296289

297-
//assign clklow_sig = fpga_clk_50;
298290
assign clkhigh_sig = hm_clk_high;
299291
assign clkmed_sig = hm_clk_med;
300292

301293

302294
genvar ig;
303295
generate for(ig=0;ig<NumGPIO;ig=ig+1) begin : iosigloop
304-
// assign io_leds_sig[ig] = hm2_leds_sig[(ig*MuxLedWidth)+:MuxLedWidth];
305296
assign io_bitsout_sig[ig] = hm2_bitsout_sig[(ig*MuxGPIOIOWidth)+:MuxGPIOIOWidth];
306297
assign io_bitsin_sig[ig] = hm2_bitsin_sig[(ig*MuxGPIOIOWidth)+:MuxGPIOIOWidth];
307298
end
308299
endgenerate
309300

310-
//assign LED[7:6] = ~hm2_leds_sig[1:0];
311-
312301
gpio_adr_decoder_reg gpio_adr_decoder_reg_inst
313302
(
314303
.CLOCK(fpga_clk_50) , // input CLOCK_sig
@@ -331,9 +320,6 @@ gpio_adr_decoder_reg gpio_adr_decoder_reg_inst
331320
.ADC_SCK_o(ADC_SCK), // output ADC_SCK_o_sig
332321
.ADC_SDI_o(ADC_SDI), // output ADC_SDI_o_sig
333322
.ADC_SDO_i(ADC_SDO), // input ADC_SDO_i_sig
334-
// CAP_Sensors
335-
// .sense({ARDUINO_IO[9],ARDUINO_IO[10],ARDUINO_IO[11],ARDUINO_IO[12]}),
336-
// .charge(ARDUINO_IO[13]),
337323
.buttons(fpga_debounced_buttons)
338324
);
339325

@@ -342,7 +328,6 @@ defparam gpio_adr_decoder_reg_inst.BusWidth = BusWidth;
342328
defparam gpio_adr_decoder_reg_inst.GPIOWidth = GPIOWidth;
343329
defparam gpio_adr_decoder_reg_inst.MuxGPIOIOWidth = MuxGPIOIOWidth;
344330
defparam gpio_adr_decoder_reg_inst.NumIOAddrReg = NumIOAddrReg;
345-
//defparam gpio_adr_decoder_reg_inst.MuxLedWidth = MuxLedWidth;
346331
defparam gpio_adr_decoder_reg_inst.NumGPIO = NumGPIO;
347332
defparam gpio_adr_decoder_reg_inst.Capsense = Capsense;
348333
defparam gpio_adr_decoder_reg_inst.NumSense = 4;
@@ -359,12 +344,9 @@ HostMot3_cfg HostMot3_inst
359344
.clkmed(clkmed_sig) , // input clkmed_sig -- Processor clock --> sserialwa, twiddle
360345
.clkhigh(clkhigh_sig) , // input clkhigh_sig -- High speed clock --> most
361346
.intirq(int_sig) , // output int_sig --int => LINT, ---> PCI ?
362-
// .dreq(dreq_sig) , // output dreq_sig
363-
// .demandmode(demandmode_sig) , // output demandmode_sig
364347
.iobitsouttop(hm2_bitsout_sig) , // inout [IOWidth-1:0] --iobits => IOBITS,-- external I/O bits
365348
.iobitsintop(hm2_bitsin_sig) // inout [IOWidth-1:0] --iobits => IOBITS,-- external I/O bits
366349
// .liobits(liobits_sig) , // inout [lIOWidth-1:0] --liobits_sig
367-
// .rates(rates_sig) , // output [4:0] rates_sig
368350
// .leds(hm2_leds_sig) // output [ledcount-1:0] leds_sig --leds => LEDS
369351
);
370352

‎HW/QuartusProjects/DE10_Nano_FB_Cramps/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@ AR_REGEX += \
120120
Makefile ip readme.txt ds5 \
121121
altera_avalon* *.qpf *.qsf *.sdc *.v *.sv *.vhd *.qsys *.tcl *.stp \
122122
*.sed quartus.ini *.sof *.rbf *.sopcinfo *.jdi output_files \
123-
hps_isw_handoff */*.svd */synthesis/*.svd *.dts *.dtb *.xml *.sh *.ipx *.in *.mif\
123+
hps_isw_handoff */*.svd */synthesis/*.svd *.dts *.dtb *.xml *.sh *.ipx *.in *.mif *.qip\
124124
$(SOFTWARE_DIR)
125125

126126
AR_FILTER_OUT += %_tb.qsys

‎HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_pin_config.qip‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
11
# I/O Daughterboard adaptor specific:
2-
set_global_assignment -name VHDL_FILE ../../hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap.vhd -library pin
2+
set_global_assignment -name VHDL_FILE ../../hm2/config/DE10_Nano_FB_Cramps/PIN_3x24.vhd -library pin

‎HW/QuartusProjects/DE10_Nano_FB_Cramps/soc_system.qsys‎

Lines changed: 8 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -413,26 +413,10 @@
413413
internal="dipsw_pio.external_connection"
414414
type="conduit"
415415
dir="end" />
416-
<interface
417-
name="hps_0_f2h_cold_reset_req"
418-
internal="hps_0.f2h_cold_reset_req"
419-
type="reset"
420-
dir="end" />
421-
<interface
422-
name="hps_0_f2h_debug_reset_req"
423-
internal="hps_0.f2h_debug_reset_req"
424-
type="reset"
425-
dir="end" />
426-
<interface
427-
name="hps_0_f2h_stm_hw_events"
428-
internal="hps_0.f2h_stm_hw_events"
429-
type="conduit"
430-
dir="end" />
431-
<interface
432-
name="hps_0_f2h_warm_reset_req"
433-
internal="hps_0.f2h_warm_reset_req"
434-
type="reset"
435-
dir="end" />
416+
<interface name="hps_0_f2h_cold_reset_req" internal="hps_0.f2h_cold_reset_req" />
417+
<interface name="hps_0_f2h_debug_reset_req" internal="hps_0.f2h_debug_reset_req" />
418+
<interface name="hps_0_f2h_stm_hw_events" internal="hps_0.f2h_stm_hw_events" />
419+
<interface name="hps_0_f2h_warm_reset_req" internal="hps_0.f2h_warm_reset_req" />
436420
<interface
437421
name="hps_0_h2f_reset"
438422
internal="hps_0.h2f_reset"
@@ -680,13 +664,13 @@
680664
<parameter name="F2H_SDRAM3_CLOCK_FREQ" value="100" />
681665
<parameter name="F2H_SDRAM4_CLOCK_FREQ" value="100" />
682666
<parameter name="F2H_SDRAM5_CLOCK_FREQ" value="100" />
683-
<parameter name="F2SCLK_COLDRST_Enable" value="true" />
684-
<parameter name="F2SCLK_DBGRST_Enable" value="true" />
667+
<parameter name="F2SCLK_COLDRST_Enable" value="false" />
668+
<parameter name="F2SCLK_DBGRST_Enable" value="false" />
685669
<parameter name="F2SCLK_PERIPHCLK_Enable" value="false" />
686670
<parameter name="F2SCLK_PERIPHCLK_FREQ" value="0" />
687671
<parameter name="F2SCLK_SDRAMCLK_Enable" value="false" />
688672
<parameter name="F2SCLK_SDRAMCLK_FREQ" value="0" />
689-
<parameter name="F2SCLK_WARMRST_Enable" value="true" />
673+
<parameter name="F2SCLK_WARMRST_Enable" value="false" />
690674
<parameter name="F2SDRAM_Type">Avalon-MM Bidirectional</parameter>
691675
<parameter name="F2SDRAM_Width" value="256" />
692676
<parameter name="F2SINTERRUPT_Enable" value="true" />
@@ -966,7 +950,7 @@
966950
<parameter name="SPIS1_Mode" value="N/A" />
967951
<parameter name="SPIS1_PinMuxing" value="Unused" />
968952
<parameter name="STARVE_LIMIT" value="10" />
969-
<parameter name="STM_Enable" value="true" />
953+
<parameter name="STM_Enable" value="false" />
970954
<parameter name="SYS_INFO_DEVICE_FAMILY" value="Cyclone V" />
971955
<parameter name="TEST_Enable" value="false" />
972956
<parameter name="TIMING_BOARD_AC_EYE_REDUCTION_H" value="0.0" />

‎HW/hm2/config/DE10_Nano_FB_Cramps/hostmot3_cfg.vhd‎

Lines changed: 6 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -125,33 +125,8 @@ end HostMot3_cfg;
125125

126126
architecture arch of HostMot3_cfg is
127127

128-
signal ibustop_sig : std_logic_vector(BusWidth -1 downto 0);
129-
-- signal obustop_sig : std_logic_vector(BusWidth -1 downto 0);
130-
signal addr_sig : std_logic_vector(AddrWidth -1 downto 2);
131-
signal readstb_sig : std_logic;
132-
signal writestb_sig : std_logic;
133-
signal intirq_sig : std_logic;
134-
signal iobitsouttop_sig : std_logic_vector(IOWidth -1 downto 0);
135-
signal iobitsintop_sig : std_logic_vector(IOWidth -1 downto 0);
136-
signal leds_sig : std_logic_vector(LEDCount -1 downto 0);
137-
138128
begin
139129

140-
process (clkhigh)
141-
begin
142-
if rising_edge(clkhigh) then
143-
ibustop_sig <= ibustop;
144-
-- obustop <= obustop_sig;
145-
addr_sig <= addr;
146-
readstb_sig <= readstb;
147-
writestb_sig <= writestb;
148-
-- intirq <= intirq_sig;
149-
-- iobitsouttop <= iobitsouttop_sig;
150-
iobitsintop_sig <= iobitsintop;
151-
-- leds <= leds_sig;
152-
end if;
153-
end process;
154-
155130
aHostMot3_cfg: entity work.HostMot3
156131
generic map (
157132
ThePinDesc => PinDesc,
@@ -184,20 +159,20 @@ begin
184159
RegStride0 => 256,
185160
RegStride1 => 256 )
186161
port map (
187-
ibustop => ibustop_sig,
162+
ibustop => ibustop,
188163
obustop => obustop,
189-
addr => addr_sig,
190-
readstb => readstb_sig,
191-
writestb => writestb_sig,
164+
addr => addr,
165+
readstb => readstb,
166+
writestb => writestb,
192167
clklow => clklow,
193168
clkmed => clkmed,
194169
clkhigh => clkhigh,
195170
intirq => intirq,
196171
dreq => dreq,
197172
demandmode => demandmode,
198173
iobitsouttop => iobitsouttop,
199-
iobitsintop => iobitsintop_sig,
174+
iobitsintop => iobitsintop,
200175
-- liobits => liobits,
201176
-- rates => rates,
202177
leds => leds );
203-
end arch;
178+
end arch;

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