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All: Change SRL16E ip cores to Quartus version 15.1
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6 files changed

+28
-28
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HW/cv-megawizard/lpm-ip/lpm_mux16.cmp

Lines changed: 6 additions & 6 deletions
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@@ -1,15 +1,15 @@
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--Copyright (C) 2017 Intel Corporation. All rights reserved.
2-
--Your use of Intel Corporation's design tools, logic functions
1+
--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
2+
--Your use of Altera Corporation's design tools, logic functions
33
--and other software and tools, and its AMPP partner logic
44
--functions, and any output files from any of the foregoing
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--(including device programming or simulation files), and any
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--associated documentation or information are expressly subject
7-
--to the terms and conditions of the Intel Program License
8-
--Subscription Agreement, the Intel Quartus Prime License Agreement,
9-
--the Intel MegaCore Function License Agreement, or other
7+
--to the terms and conditions of the Altera Program License
8+
--Subscription Agreement, the Altera Quartus Prime License Agreement,
9+
--the Altera MegaCore Function License Agreement, or other
1010
--applicable license agreement, including, without limitation,
1111
--that your use is for the sole purpose of programming logic
12-
--devices manufactured by Intel and sold by Intel or its
12+
--devices manufactured by Altera and sold by Altera or its
1313
--authorized distributors. Please refer to the applicable
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--agreement for further details.
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Lines changed: 1 addition & 1 deletion
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@@ -1,5 +1,5 @@
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set_global_assignment -name IP_TOOL_NAME "LPM_MUX"
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set_global_assignment -name IP_TOOL_VERSION "16.1"
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set_global_assignment -name IP_TOOL_VERSION "15.1"
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set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}"
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set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_mux16.vhd"]
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set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mux16.cmp"]

HW/cv-megawizard/lpm-ip/lpm_mux16.vhd

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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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--
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-- 16.1.2 Build 203 01/18/2017 SJ Standard Edition
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-- 15.1.2 Build 193 02/01/2016 SJ Standard Edition
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-- ************************************************************
1919

2020

21-
--Copyright (C) 2017 Intel Corporation. All rights reserved.
22-
--Your use of Intel Corporation's design tools, logic functions
21+
--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
22+
--Your use of Altera Corporation's design tools, logic functions
2323
--and other software and tools, and its AMPP partner logic
2424
--functions, and any output files from any of the foregoing
2525
--(including device programming or simulation files), and any
2626
--associated documentation or information are expressly subject
27-
--to the terms and conditions of the Intel Program License
28-
--Subscription Agreement, the Intel Quartus Prime License Agreement,
29-
--the Intel MegaCore Function License Agreement, or other
27+
--to the terms and conditions of the Altera Program License
28+
--Subscription Agreement, the Altera Quartus Prime License Agreement,
29+
--the Altera MegaCore Function License Agreement, or other
3030
--applicable license agreement, including, without limitation,
3131
--that your use is for the sole purpose of programming logic
32-
--devices manufactured by Intel and sold by Intel or its
32+
--devices manufactured by Altera and sold by Altera or its
3333
--authorized distributors. Please refer to the applicable
3434
--agreement for further details.
3535

HW/cv-megawizard/lpm-ip/lpm_shiftreg16.cmp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
1-
--Copyright (C) 2017 Intel Corporation. All rights reserved.
2-
--Your use of Intel Corporation's design tools, logic functions
1+
--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
2+
--Your use of Altera Corporation's design tools, logic functions
33
--and other software and tools, and its AMPP partner logic
44
--functions, and any output files from any of the foregoing
55
--(including device programming or simulation files), and any
66
--associated documentation or information are expressly subject
7-
--to the terms and conditions of the Intel Program License
8-
--Subscription Agreement, the Intel Quartus Prime License Agreement,
9-
--the Intel MegaCore Function License Agreement, or other
7+
--to the terms and conditions of the Altera Program License
8+
--Subscription Agreement, the Altera Quartus Prime License Agreement,
9+
--the Altera MegaCore Function License Agreement, or other
1010
--applicable license agreement, including, without limitation,
1111
--that your use is for the sole purpose of programming logic
12-
--devices manufactured by Intel and sold by Intel or its
12+
--devices manufactured by Altera and sold by Altera or its
1313
--authorized distributors. Please refer to the applicable
1414
--agreement for further details.
1515

HW/cv-megawizard/lpm-ip/lpm_shiftreg16.qip

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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set_global_assignment -name IP_TOOL_NAME "LPM_SHIFTREG"
2-
set_global_assignment -name IP_TOOL_VERSION "16.1"
2+
set_global_assignment -name IP_TOOL_VERSION "15.1"
33
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}"
44
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_shiftreg16.vhd"]
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set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg16_inst.vhd"]

HW/cv-megawizard/lpm-ip/lpm_shiftreg16.vhd

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,22 +14,22 @@
1414
-- ************************************************************
1515
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
1616
--
17-
-- 16.1.2 Build 203 01/18/2017 SJ Standard Edition
17+
-- 15.1.2 Build 193 02/01/2016 SJ Standard Edition
1818
-- ************************************************************
1919

2020

21-
--Copyright (C) 2017 Intel Corporation. All rights reserved.
22-
--Your use of Intel Corporation's design tools, logic functions
21+
--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
22+
--Your use of Altera Corporation's design tools, logic functions
2323
--and other software and tools, and its AMPP partner logic
2424
--functions, and any output files from any of the foregoing
2525
--(including device programming or simulation files), and any
2626
--associated documentation or information are expressly subject
27-
--to the terms and conditions of the Intel Program License
28-
--Subscription Agreement, the Intel Quartus Prime License Agreement,
29-
--the Intel MegaCore Function License Agreement, or other
27+
--to the terms and conditions of the Altera Program License
28+
--Subscription Agreement, the Altera Quartus Prime License Agreement,
29+
--the Altera MegaCore Function License Agreement, or other
3030
--applicable license agreement, including, without limitation,
3131
--that your use is for the sole purpose of programming logic
32-
--devices manufactured by Intel and sold by Intel or its
32+
--devices manufactured by Altera and sold by Altera or its
3333
--authorized distributors. Please refer to the applicable
3434
--agreement for further details.
3535

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