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klensy
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revert COMs
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5 files changed

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-28
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5 files changed

+24
-28
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‎llvm/test/MC/AsmParser/labels.s‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ foo:
2929
// CHECK: .long 11
3030
.long "a 0"
3131

32-
// CHECK: .section "a 1,a 2"
32+
// COM: CHECK: .section "a 1,a 2"
3333
//.section "a 1", "a 2"
3434

3535
// CHECK: .globl "a 3"

‎llvm/test/MC/Mips/micromips-dsp/invalid.s‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -9,16 +9,14 @@
99
shll_s.ph $3, $4, -1 # CHECK: :[[@LINE]]:21: error: expected 4-bit unsigned immediate
1010
shll.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
1111
shll.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
12-
// FIXME: Following invalid tests are temporarely disabled, until operand check for uimm5 is added
13-
shll_s.w $3, $4, 32 # COM: CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
14-
shll_s.w $3, $4, -1 # COM: CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
12+
shll_s.w $3, $4, 32 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
13+
shll_s.w $3, $4, -1 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
1514
shra.ph $3, $4, 16 # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
1615
shra.ph $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
1716
shra_r.ph $3, $4, 16 # CHECK: :[[@LINE]]:21: error: expected 4-bit unsigned immediate
1817
shra_r.ph $3, $4, -1 # CHECK: :[[@LINE]]:21: error: expected 4-bit unsigned immediate
19-
// FIXME: Following invalid tests are temporarely disabled, until operand check for uimm5 is added
20-
shra_r.w $3, $4, 32 # COM: CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
21-
shra_r.w $3, $4, -1 # COM: CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
18+
shra_r.w $3, $4, 32 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
19+
shra_r.w $3, $4, -1 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
2220
shrl.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
2321
shrl.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
2422
shilo $ac1, 64 # CHECK: :[[@LINE]]:15: error: expected 6-bit signed immediate

‎llvm/test/MC/Mips/mips32r6/invalid.s‎

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -38,15 +38,14 @@ local_label:
3838
lhu $4, 2147483648($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset
3939
lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
4040
lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
41-
// FIXME: Following tests are temporarily disabled, until "PredicateControl not in hierarchy" problem is resolved
42-
bltl $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
43-
bltul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44-
blel $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
45-
bleul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
46-
bgel $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
47-
bgeul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
48-
bgtl $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
49-
bgtul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
41+
bltl $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
42+
bltul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
43+
blel $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44+
bleul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
45+
bgel $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
46+
bgeul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
47+
bgtl $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
48+
bgtul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
5049
bgec $0, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
5150
bltc $0, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
5251
bgeuc $0, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction

‎llvm/test/MC/Mips/mips64r6/invalid.s‎

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -64,15 +64,14 @@ local_label:
6464
lhe $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
6565
lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
6666
lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
67-
// FIXME: Following tests are temporarily disabled, until "PredicateControl not in hierarchy" problem is resolved
68-
bltl $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
69-
bltul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
70-
blel $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
71-
bleul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
72-
bgel $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
73-
bgeul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
74-
bgtl $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
75-
bgtul $7, $8, local_label # COM: CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
67+
bltl $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
68+
bltul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
69+
blel $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
70+
bleul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
71+
bgel $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
72+
bgeul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
73+
bgtl $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
74+
bgtul $7, $8, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
7675
beqc $0, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
7776
bnec $0, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
7877
bgec $2, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different

‎llvm/test/MC/PowerPC/ppc64-encoding-vmx.s‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -738,9 +738,9 @@
738738
# CHECK-LE: vpopcntw 2, 3 # encoding: [0x83,0x1f,0x40,0x10]
739739
vpopcntw 2, 3
740740

741-
# CHECK-BE: vpopcntd 2, 3 # encoding: [0x10,0x40,0x1f,0xC3]
742-
# CHECK-LE: vpopcntd 2, 3 # encoding: [0xC3,0x1f,0x40,0x10]
743-
# vpopcntd 2, 3
741+
# CHECK-BE: vpopcntd 2, 3 # encoding: [0x10,0x40,0x1f,0xc3]
742+
# CHECK-LE: vpopcntd 2, 3 # encoding: [0xc3,0x1f,0x40,0x10]
743+
vpopcntd 2, 3
744744

745745
# Vector status and control register instructions
746746

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