@@ -181,13 +181,13 @@ class ZvkMxSet<string vd_lmul> {
181181}
182182
183183class VPseudoUnaryNoMask_Zvk<DAGOperand RetClass, VReg OpClass> :
184- Pseudo<(outs RetClass:$rd ),
185- (ins RetClass:$merge , OpClass:$rs2, AVL:$vl, ixlenimm:$sew, ixlenimm:$policy), []>,
184+ Pseudo<(outs RetClass:$rd_wb ),
185+ (ins RetClass:$rd , OpClass:$rs2, AVL:$vl, ixlenimm:$sew, ixlenimm:$policy), []>,
186186 RISCVVPseudo {
187187 let mayLoad = 0;
188188 let mayStore = 0;
189189 let hasSideEffects = 0;
190- let Constraints = "$rd = $merge ";
190+ let Constraints = "$rd_wb = $rd ";
191191 let HasVLOp = 1;
192192 let HasSEWOp = 1;
193193 let HasVecPolicyOp = 1;
@@ -197,14 +197,14 @@ class VPseudoUnaryNoMask_Zvk<DAGOperand RetClass, VReg OpClass> :
197197class VPseudoBinaryNoMask_Zvk<VReg RetClass,
198198 VReg Op1Class,
199199 DAGOperand Op2Class> :
200- Pseudo<(outs RetClass:$rd ),
201- (ins RetClass:$merge , Op1Class:$rs2, Op2Class:$rs1,
200+ Pseudo<(outs RetClass:$rd_wb ),
201+ (ins RetClass:$rd , Op1Class:$rs2, Op2Class:$rs1,
202202 AVL:$vl, ixlenimm:$sew, ixlenimm:$policy), []>,
203203 RISCVVPseudo {
204204 let mayLoad = 0;
205205 let mayStore = 0;
206206 let hasSideEffects = 0;
207- let Constraints = "$rd = $merge ";
207+ let Constraints = "$rd_wb = $rd ";
208208 let HasVLOp = 1;
209209 let HasSEWOp = 1;
210210 let HasVecPolicyOp = 1;
@@ -670,11 +670,11 @@ class VPatUnaryNoMask_Zvk<string intrinsic_name,
670670 VReg result_reg_class,
671671 VReg op2_reg_class> :
672672 Pat<(result_type (!cast<Intrinsic>(intrinsic_name)
673- (result_type result_reg_class:$merge ),
673+ (result_type result_reg_class:$rd ),
674674 (op2_type op2_reg_class:$rs2),
675675 VLOpFrag, (XLenVT timm:$policy))),
676676 (!cast<Instruction>(inst#"_"#kind#"_"#vlmul.MX)
677- (result_type result_reg_class:$merge ),
677+ (result_type result_reg_class:$rd ),
678678 (op2_type op2_reg_class:$rs2),
679679 GPR:$vl, sew, (XLenVT timm:$policy))>;
680680
@@ -689,11 +689,11 @@ class VPatUnaryNoMask_VS_Zvk<string intrinsic_name,
689689 VReg result_reg_class,
690690 VReg op2_reg_class> :
691691 Pat<(result_type (!cast<Intrinsic>(intrinsic_name)
692- (result_type result_reg_class:$merge ),
692+ (result_type result_reg_class:$rd ),
693693 (op2_type op2_reg_class:$rs2),
694694 VLOpFrag, (XLenVT timm:$policy))),
695695 (!cast<Instruction>(inst#"_"#kind#"_"#vlmul.MX#"_"#vs2_lmul.MX)
696- (result_type result_reg_class:$merge ),
696+ (result_type result_reg_class:$rd ),
697697 (op2_type op2_reg_class:$rs2),
698698 GPR:$vl, sew, (XLenVT timm:$policy))>;
699699
0 commit comments