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Expand and rename Relocation Models
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3 files changed

+45
-9
lines changed

3 files changed

+45
-9
lines changed

Sources/LLVM/TargetData.swift

Lines changed: 39 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -463,16 +463,49 @@ public enum CodeGenOptLevel {
463463
}
464464

465465
/// The relocation model types supported by LLVM.
466-
public enum RelocMode {
466+
public enum RelocationModel {
467467
/// Generated code will assume the default for a particular target architecture.
468468
case `default`
469469
/// Generated code will exist at static offsets.
470470
case `static`
471-
/// Generated code will be Position-Independent.
471+
/// Generated code will be position-independent.
472472
case pic
473-
/// Generated code will not be Position-Independent and may be used in static
473+
/// Generated code will not be position-independent and may be used in static
474474
/// or dynamic executables but not necessarily a shared library.
475475
case dynamicNoPIC
476+
/// Generated code will be compiled in read-only position independent mode.
477+
/// In this mode, all read-only data and functions are at a link-time constant
478+
/// offset from the program counter.
479+
///
480+
/// ROPI is not supported by all target architectures and calling conventions.
481+
/// It is a particular feature of ARM targets, though.
482+
///
483+
/// ROPI may be useful to avoid committing to compile-time constant locations
484+
/// for code in memory. This may be useful in the following circumstances:
485+
///
486+
/// - Code is loaded dynamically.
487+
/// - Code is loaded into memory conditionally, or in an undefined order.
488+
/// - Code is mapped into different addresses during different executions.
489+
case ropi
490+
/// Generated code will be compiled in read-write position independent mode.
491+
/// In this mode, all writable data is at a link-time constant offset from the
492+
/// static base register.
493+
///
494+
/// RWPI is not supported by all target architectures and calling conventions.
495+
/// It is a particular feature of ARM targets, though.
496+
///
497+
/// RWPI may be useful to avoid committing to compile-time constant locations
498+
/// for code in memory. This is particularly useful for data that must be
499+
/// multiply instantiated for reentrant routines, as each thread executing a
500+
/// reentrant routine will recieve its own copy of any data in
501+
/// read-write segments.
502+
case rwpi
503+
/// Combines the `ropi` and `rwpi` modes. Generated code will be compiled in
504+
/// both read-only and read-write position independent modes. All read-only
505+
/// data appears at a link-time constant offset from the program counter,
506+
/// and all writable data appears at a link-time constant offset from the
507+
/// static base register.
508+
case ropiRWPI
476509

477510
/// Returns the underlying `LLVMRelocMode` associated with this
478511
/// relocation model.
@@ -482,6 +515,9 @@ public enum RelocMode {
482515
case .static: return LLVMRelocStatic
483516
case .pic: return LLVMRelocPIC
484517
case .dynamicNoPIC: return LLVMRelocDynamicNoPic
518+
case .ropi: return LLVMRelocROPI
519+
case .rwpi: return LLVMRelocRWPI
520+
case .ropiRWPI: return LLVMRelocROPI_RWPI
485521
}
486522
}
487523
}

Sources/LLVM/TargetMachine.swift

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -184,14 +184,14 @@ public class TargetMachine {
184184
/// particular target provides.
185185
/// - parameter optLevel: The optimization level for generated code. If no
186186
/// value is provided, the default level of optimization is assumed.
187-
/// - parameter relocMode: The relocation mode of the target environment. If
188-
/// no mode is provided, the default mode for the target architecture is
187+
/// - parameter relocations: The relocation model of the target environment.
188+
/// If no mode is provided, the default model for the target architecture is
189189
/// assumed.
190190
/// - parameter codeModel: The kind of code to produce for this target. If
191191
/// no model is provided, the default model for the target architecture is
192192
/// assumed.
193193
public init(triple: String? = nil, cpu: String = "", features: String = "",
194-
optLevel: CodeGenOptLevel = .default, relocMode: RelocMode = .default,
194+
optLevel: CodeGenOptLevel = .default, relocations: RelocationModel = .default,
195195
codeModel: CodeModel = .default) throws {
196196

197197
// Ensure the LLVM initializer is called when the first module is created
@@ -209,7 +209,7 @@ public class TargetMachine {
209209
self.target = Target(llvm: target!)
210210
self.llvm = LLVMCreateTargetMachine(target!, self.triple, cpu, features,
211211
optLevel.asLLVM(),
212-
relocMode.asLLVM(),
212+
relocations.asLLVM(),
213213
codeModel.asLLVM())
214214
self.dataLayout = TargetData(llvm: LLVMCreateTargetDataLayout(self.llvm))
215215
}

Tests/LLVMTests/UnitSpec.swift

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ class UnitSpec : XCTestCase {
8080
func testStructLayoutOnMachine() {
8181
let mod = Module(name: "StructLayout")
8282
let aarch64 = try! TargetMachine(triple: "aarch64--", cpu: "", features: "",
83-
optLevel: .none, relocMode: .default, codeModel: .default)
83+
optLevel: .none, relocations: .default, codeModel: .default)
8484
mod.dataLayout = aarch64.dataLayout
8585
XCTAssertEqual(mod.dataLayoutString, "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128")
8686

@@ -115,7 +115,7 @@ class UnitSpec : XCTestCase {
115115
])
116116

117117
let aarch32 = try! TargetMachine(triple: "arm--", cpu: "", features: "",
118-
optLevel: .none, relocMode: .default, codeModel: .default)
118+
optLevel: .none, relocations: .default, codeModel: .default)
119119
mod.dataLayout = aarch32.dataLayout
120120
XCTAssertEqual(mod.dataLayoutString, "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64")
121121

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