Merge pull request #26 from CodaFi/full-employment

100% Documentation Coverage

Author: CodaFi

Sources/LLVM/FloatType.swift

@@ -1,7 +1,7 @@
 import cllvm
 
 /// `FloatType` enumerates representations of a floating value of a particular
-// bit width and semantics.
+/// bit width and semantics.
 public enum FloatType: IRType {
   /// 16-bit floating point value
   case half

Sources/LLVM/Instruction.swift

@@ -31,6 +31,7 @@ public struct Instruction: IRValue {
         return Instruction(llvm: val)
     }
 
+    /// Retrieves the first use of this instruction.
     public var firstUse: Use? {
         guard let use = LLVMGetFirstUse(llvm) else { return nil }
         return Use(llvm: use)

Sources/LLVM/OpCode.swift

@@ -7,153 +7,153 @@ import cllvm
 public enum OpCode: UInt32 {
     // MARK: Terminator Instructions
 
-    // The opcode for the `ret` instruction.
+    /// The opcode for the `ret` instruction.
     case ret            = 1
-    // The opcode for the `br` instruction.
+    /// The opcode for the `br` instruction.
     case br             = 2
-    // The opcode for the `switch` instruction.
+    /// The opcode for the `switch` instruction.
     case `switch`       = 3
-    // The opcode for the `indirectBr` instruction.
+    /// The opcode for the `indirectBr` instruction.
     case indirectBr     = 4
-    // The opcode for the `invoke` instruction.
+    /// The opcode for the `invoke` instruction.
     case invoke         = 5
-    // The opcode for the `unreachable` instruction.
+    /// The opcode for the `unreachable` instruction.
     case unreachable    = 7
 
     // MARK: Standard Binary Operators
 
-    // The opcode for the `add` instruction.
+    /// The opcode for the `add` instruction.
     case add            = 8
-    // The opcode for the `fadd` instruction.
+    /// The opcode for the `fadd` instruction.
     case fadd           = 9
-    // The opcode for the `sub` instruction.
+    /// The opcode for the `sub` instruction.
     case sub            = 10
-    // The opcode for the `fsub` instruction.
+    /// The opcode for the `fsub` instruction.
     case fsub           = 11
-    // The opcode for the `mul` instruction.
+    /// The opcode for the `mul` instruction.
     case mul            = 12
-    // The opcode for the `fmul` instruction.
+    /// The opcode for the `fmul` instruction.
     case fmul           = 13
-    // The opcode for the `udiv` instruction.
+    /// The opcode for the `udiv` instruction.
     case udiv           = 14
-    // The opcode for the `sdiv` instruction.
+    /// The opcode for the `sdiv` instruction.
     case sdiv           = 15
-    // The opcode for the `fdiv` instruction.
+    /// The opcode for the `fdiv` instruction.
     case fdiv           = 16
-    // The opcode for the `urem` instruction.
+    /// The opcode for the `urem` instruction.
     case urem           = 17
-    // The opcode for the `srem` instruction.
+    /// The opcode for the `srem` instruction.
     case srem           = 18
-    // The opcode for the `frem` instruction.
+    /// The opcode for the `frem` instruction.
     case frem           = 19
 
     // MARK: Logical Operators
 
-    // The opcode for the `shl` instruction.
+    /// The opcode for the `shl` instruction.
     case shl            = 20
-    // The opcode for the `lshr` instruction.
+    /// The opcode for the `lshr` instruction.
     case lshr           = 21
-    // The opcode for the `ashr` instruction.
+    /// The opcode for the `ashr` instruction.
     case ashr           = 22
-    // The opcode for the `and` instruction.
+    /// The opcode for the `and` instruction.
     case and            = 23
-    // The opcode for the `or` instruction.
+    /// The opcode for the `or` instruction.
     case or             = 24
-    // The opcode for the `xor` instruction.
+    /// The opcode for the `xor` instruction.
     case xor            = 25
 
     // MARK: Memory Operators
 
-    // The opcode for the `alloca` instruction.
+    /// The opcode for the `alloca` instruction.
     case alloca         = 26
-    // The opcode for the `load` instruction.
+    /// The opcode for the `load` instruction.
     case load           = 27
-    // The opcode for the `store` instruction.
+    /// The opcode for the `store` instruction.
     case store          = 28
-    // The opcode for the `getElementPtr` instruction.
+    /// The opcode for the `getElementPtr` instruction.
     case getElementPtr  = 29
 
     // MARK: Cast Operators
 
-    // The opcode for the `trunc` instruction.
+    /// The opcode for the `trunc` instruction.
     case trunc          = 30
-    // The opcode for the `zext` instruction.
+    /// The opcode for the `zext` instruction.
     case zext           = 31
-    // The opcode for the `sext` instruction.
+    /// The opcode for the `sext` instruction.
     case sext           = 32
-    // The opcode for the `fpToUI` instruction.
+    /// The opcode for the `fpToUI` instruction.
     case fpToUI         = 33
-    // The opcode for the `fpToSI` instruction.
+    /// The opcode for the `fpToSI` instruction.
     case fpToSI         = 34
-    // The opcode for the `uiToFP` instruction.
+    /// The opcode for the `uiToFP` instruction.
     case uiToFP         = 35
-    // The opcode for the `siToFP` instruction.
+    /// The opcode for the `siToFP` instruction.
     case siToFP         = 36
-    // The opcode for the `fpTrunc` instruction.
+    /// The opcode for the `fpTrunc` instruction.
     case fpTrunc        = 37
-    // The opcode for the `fpExt` instruction.
+    /// The opcode for the `fpExt` instruction.
     case fpExt          = 38
-    // The opcode for the `ptrToInt` instruction.
+    /// The opcode for the `ptrToInt` instruction.
     case ptrToInt       = 39
-    // The opcode for the `intToPtr` instruction.
+    /// The opcode for the `intToPtr` instruction.
     case intToPtr       = 40
-    // The opcode for the `bitCast` instruction.
+    /// The opcode for the `bitCast` instruction.
     case bitCast        = 41
-    // The opcode for the `addrSpaceCast` instruction.
+    /// The opcode for the `addrSpaceCast` instruction.
     case addrSpaceCast  = 60
 
     // MARK: Other Operators
 
-    // The opcode for the `icmp` instruction.
+    /// The opcode for the `icmp` instruction.
     case icmp           = 42
-    // The opcode for the `fcmp` instruction.
+    /// The opcode for the `fcmp` instruction.
     case fcmp           = 43
-    // The opcode for the `PHI` instruction.
+    /// The opcode for the `PHI` instruction.
     case PHI            = 44
-    // The opcode for the `call` instruction.
+    /// The opcode for the `call` instruction.
     case call           = 45
-    // The opcode for the `select` instruction.
+    /// The opcode for the `select` instruction.
     case select         = 46
-    // The opcode for the `userOp1` instruction.
+    /// The opcode for the `userOp1` instruction.
     case userOp1        = 47
-    // The opcode for the `userOp2` instruction.
+    /// The opcode for the `userOp2` instruction.
     case userOp2        = 48
-    // The opcode for the `vaArg` instruction.
+    /// The opcode for the `vaArg` instruction.
     case vaArg          = 49
-    // The opcode for the `extractElement` instruction.
+    /// The opcode for the `extractElement` instruction.
     case extractElement = 50
-    // The opcode for the `insertElement` instruction.
+    /// The opcode for the `insertElement` instruction.
     case insertElement  = 51
-    // The opcode for the `shuffleVector` instruction.
+    /// The opcode for the `shuffleVector` instruction.
     case shuffleVector  = 52
-    // The opcode for the `extractValue` instruction.
+    /// The opcode for the `extractValue` instruction.
     case extractValue   = 53
-    // The opcode for the `insertValue` instruction.
+    /// The opcode for the `insertValue` instruction.
     case insertValue    = 54
 
     // MARK: Atomic operators
 
-    // The opcode for the `fence` instruction.
+    /// The opcode for the `fence` instruction.
     case fence          = 55
-    // The opcode for the `atomicCmpXchg` instruction.
+    /// The opcode for the `atomicCmpXchg` instruction.
     case atomicCmpXchg  = 56
-    // The opcode for the `atomicRMW` instruction.
+    /// The opcode for the `atomicRMW` instruction.
     case atomicRMW      = 57
 
     // MARK: Exception Handling Operators
 
-    // The opcode for the `resume` instruction.
+    /// The opcode for the `resume` instruction.
     case resume         = 58
-    // The opcode for the `landingPad` instruction.
+    /// The opcode for the `landingPad` instruction.
     case landingPad     = 59
-    // The opcode for the `cleanupRet` instruction.
+    /// The opcode for the `cleanupRet` instruction.
     case cleanupRet     = 61
-    // The opcode for the `catchRet` instruction.
+    /// The opcode for the `catchRet` instruction.
     case catchRet       = 62
-    // The opcode for the `catchPad` instruction.
+    /// The opcode for the `catchPad` instruction.
     case catchPad       = 63
-    // The opcode for the `cleanupPad` instruction.
+    /// The opcode for the `cleanupPad` instruction.
     case cleanupPad     = 64
-    // The opcode for the `catchSwitch` instruction.
+    /// The opcode for the `catchSwitch` instruction.
     case catchSwitch    = 65
 }

Sources/LLVM/StructType.swift

@@ -28,6 +28,11 @@ public struct StructType: IRType {
     self.llvm = llvm
   }
 
+  /// Creates a structure type from an array of component element types.
+  ///
+  /// - parameter elementTypes: A list of types of members of this structure.
+  /// - parameter isPacked: Whether or not this structure is 1-byte aligned with
+  ///   no packing between fields.  Defaults to `false`.
   public init(elementTypes: [IRType], isPacked: Bool = false) {
     var irTypes = elementTypes.map { $0.asLLVM() as Optional }
     self.llvm = irTypes.withUnsafeMutableBufferPointer { buf in
@@ -39,7 +44,7 @@ public struct StructType: IRType {
   ///
   /// - parameter types: A list of types of members of this structure.
   /// - parameter isPacked: Whether or not this structure is 1-byte aligned with
-  /// - no packing between fields.  Defaults to `false`.
+  ///   no packing between fields.  Defaults to `false`.
   public func setBody(_ types: [IRType], isPacked: Bool = false) {
     var _types = types.map { $0.asLLVM() as Optional }
     _types.withUnsafeMutableBufferPointer { buf in
@@ -52,7 +57,7 @@ public struct StructType: IRType {
   ///
   /// - parameter values: A list of values of members of this structure.
   /// - parameter isPacked: Whether or not this structure is 1-byte aligned with
-  /// - no packing between fields.  Defaults to `false`.
+  ///   no packing between fields.  Defaults to `false`.
   ///
   /// - returns: A value representing a constant value of this structure type.
   public static func constant(values: [IRValue], isPacked: Bool = false) -> IRValue {

Sources/LLVM/TargetData.swift

@@ -106,24 +106,33 @@ public class TargetData {
   }
 
   /// Computes the minimum ABI-required alignment for the specified type.
+  ///
   /// - parameter type: The type to whose ABI alignment you wish to compute.
   /// - returns: The minimum ABI-required alignment for the specified type.
   public func abiAlignment(of type: IRType) -> Int {
     return Int(LLVMABIAlignmentOfType(llvm, type.asLLVM()))
   }
 
+  /// Computes the minimum ABI-required alignment for the specified type.
+  ///
+  /// This function is equivalent to `TargetData.abiAlignment(of:)`.
+  ///
+  /// - parameter type: The type to whose ABI alignment you wish to compute.
+  /// - returns: The minimum ABI-required alignment for the specified type.
   public func callFrameAlignment(of type: IRType) -> Int {
     return Int(LLVMCallFrameAlignmentOfType(llvm, type.asLLVM()))
   }
 
   /// Computes the ABI size of a type in bytes for a target.
+  ///
   /// - parameter type: The type to whose ABI size you wish to compute.
   /// - returns: The ABI size for the specified type.
   public func abiSize(of type: IRType) -> Int {
     return Int(LLVMABISizeOfType(llvm, type.asLLVM()))
   }
   /// Computes the maximum number of bytes that may be overwritten by
   /// storing the specified type.
+  ///
   /// - parameter type: The type to whose store size you wish to compute.
   /// - returns: The store size of the type in the given target.
   public func storeSize(of type: IRType) -> Int {
@@ -149,6 +158,8 @@ public class TargetData {
   }
 }
 
+/// `ByteOrder` enumerates the ordering semantics of sequences of bytes on a
+/// particular target architecture.
 public enum ByteOrder {
   /// Little-endian byte order. In a little-endian platform, the _least_
   /// significant bytes come before the _most_ significant bytes in a series, 

Sources/LLVM/TargetMachine.swift

@@ -68,6 +68,8 @@ public enum TargetMachineError: Error, CustomStringConvertible {
 /// a host architecture, vendor, ABI, etc.
 public class Target {
   internal let llvm: LLVMTargetRef
+
+  /// Creates a `Target` object from an LLVM target object.
   public init(llvm: LLVMTargetRef) {
     self.llvm = llvm
   }