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Commit c0477a1

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bjorn3bjorn3
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Sync from rust b5b1356 
2 parents c511676 + 0eb782b commit c0477a1

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6 files changed

+41
-21
lines changed

6 files changed

+41
-21
lines changed

‎src/base.rs‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -832,9 +832,10 @@ fn codegen_stmt<'tcx>(
832832
let val = match null_op {
833833
NullOp::SizeOf => layout.size.bytes(),
834834
NullOp::AlignOf => layout.align.abi.bytes(),
835-
NullOp::OffsetOf(fields) => {
836-
layout.offset_of_subfield(fx, fields.iter()).bytes()
837-
}
835+
NullOp::OffsetOf(fields) => fx
836+
.tcx
837+
.offset_of_subfield(ParamEnv::reveal_all(), layout, fields.iter())
838+
.bytes(),
838839
NullOp::UbChecks => {
839840
let val = fx.tcx.sess.ub_checks();
840841
let val = CValue::by_val(

‎src/constant.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ pub(crate) fn codegen_const_value<'tcx>(
110110
if fx.clif_type(layout.ty).is_some() {
111111
return CValue::const_val(fx, layout, int);
112112
} else {
113-
let raw_val = int.size().truncate(int.assert_bits(int.size()));
113+
let raw_val = int.size().truncate(int.to_bits(int.size()));
114114
let val = match int.size().bytes() {
115115
1 => fx.bcx.ins().iconst(types::I8, raw_val as i64),
116116
2 => fx.bcx.ins().iconst(types::I16, raw_val as i64),
@@ -501,12 +501,12 @@ pub(crate) fn mir_operand_get_const_val<'tcx>(
501501
Ordering::Equal => scalar_int,
502502
Ordering::Less => match ty.kind() {
503503
ty::Uint(_) => ScalarInt::try_from_uint(
504-
scalar_int.assert_uint(scalar_int.size()),
504+
scalar_int.to_uint(scalar_int.size()),
505505
fx.layout_of(*ty).size,
506506
)
507507
.unwrap(),
508508
ty::Int(_) => ScalarInt::try_from_int(
509-
scalar_int.assert_int(scalar_int.size()),
509+
scalar_int.to_int(scalar_int.size()),
510510
fx.layout_of(*ty).size,
511511
)
512512
.unwrap(),

‎src/driver/aot.rs‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -288,6 +288,29 @@ fn produce_final_output_artifacts(
288288
}
289289
}
290290

291+
if sess.opts.json_artifact_notifications {
292+
if codegen_results.modules.len() == 1 {
293+
codegen_results.modules[0].for_each_output(|_path, ty| {
294+
if sess.opts.output_types.contains_key(&ty) {
295+
let descr = ty.shorthand();
296+
// for single cgu file is renamed to drop cgu specific suffix
297+
// so we regenerate it the same way
298+
let path = crate_output.path(ty);
299+
sess.dcx().emit_artifact_notification(path.as_path(), descr);
300+
}
301+
});
302+
} else {
303+
for module in &codegen_results.modules {
304+
module.for_each_output(|path, ty| {
305+
if sess.opts.output_types.contains_key(&ty) {
306+
let descr = ty.shorthand();
307+
sess.dcx().emit_artifact_notification(&path, descr);
308+
}
309+
});
310+
}
311+
}
312+
}
313+
291314
// We leave the following files around by default:
292315
// - #crate#.o
293316
// - #crate#.crate.metadata.o

‎src/intrinsics/llvm_x86.rs‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -911,7 +911,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
911911
.span_fatal(span, "Index argument for `_mm_cmpestri` is not a constant");
912912
};
913913

914-
let imm8 = imm8.try_to_u8().unwrap_or_else(|_| panic!("kind not scalar: {:?}", imm8));
914+
let imm8 = imm8.to_u8();
915915

916916
codegen_inline_asm_inner(
917917
fx,
@@ -964,7 +964,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
964964
.span_fatal(span, "Index argument for `_mm_cmpestrm` is not a constant");
965965
};
966966

967-
let imm8 = imm8.try_to_u8().unwrap_or_else(|_| panic!("kind not scalar: {:?}", imm8));
967+
let imm8 = imm8.to_u8();
968968

969969
codegen_inline_asm_inner(
970970
fx,
@@ -1012,7 +1012,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
10121012
);
10131013
};
10141014

1015-
let imm8 = imm8.try_to_u8().unwrap_or_else(|_| panic!("kind not scalar: {:?}", imm8));
1015+
let imm8 = imm8.to_u8();
10161016

10171017
codegen_inline_asm_inner(
10181018
fx,
@@ -1049,7 +1049,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
10491049
);
10501050
};
10511051

1052-
let imm8 = imm8.try_to_u8().unwrap_or_else(|_| panic!("kind not scalar: {:?}", imm8));
1052+
let imm8 = imm8.to_u8();
10531053

10541054
codegen_inline_asm_inner(
10551055
fx,
@@ -1204,7 +1204,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
12041204
.span_fatal(span, "Func argument for `_mm_sha1rnds4_epu32` is not a constant");
12051205
};
12061206

1207-
let func = func.try_to_u8().unwrap_or_else(|_| panic!("kind not scalar: {:?}", func));
1207+
let func = func.to_u8();
12081208

12091209
codegen_inline_asm_inner(
12101210
fx,

‎src/intrinsics/simd.rs‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
133133
.expect_const()
134134
.eval(fx.tcx, ty::ParamEnv::reveal_all(), span)
135135
.unwrap()
136+
.1
136137
.unwrap_branch();
137138

138139
assert_eq!(x.layout(), y.layout());
@@ -146,8 +147,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
146147

147148
let total_len = lane_count * 2;
148149

149-
let indexes =
150-
idx.iter().map(|idx| idx.unwrap_leaf().try_to_u32().unwrap()).collect::<Vec<u32>>();
150+
let indexes = idx.iter().map(|idx| idx.unwrap_leaf().to_u32()).collect::<Vec<u32>>();
151151

152152
for &idx in &indexes {
153153
assert!(u64::from(idx) < total_len, "idx {} out of range 0..{}", idx, total_len);
@@ -281,9 +281,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
281281
fx.tcx.dcx().span_fatal(span, "Index argument for `simd_insert` is not a constant");
282282
};
283283

284-
let idx: u32 = idx_const
285-
.try_to_u32()
286-
.unwrap_or_else(|_| panic!("kind not scalar: {:?}", idx_const));
284+
let idx: u32 = idx_const.to_u32();
287285
let (lane_count, _lane_ty) = base.layout().ty.simd_size_and_type(fx.tcx);
288286
if u64::from(idx) >= lane_count {
289287
fx.tcx.dcx().span_fatal(
@@ -329,9 +327,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
329327
return;
330328
};
331329

332-
let idx = idx_const
333-
.try_to_u32()
334-
.unwrap_or_else(|_| panic!("kind not scalar: {:?}", idx_const));
330+
let idx = idx_const.to_u32();
335331
let (lane_count, _lane_ty) = v.layout().ty.simd_size_and_type(fx.tcx);
336332
if u64::from(idx) >= lane_count {
337333
fx.tcx.dcx().span_fatal(

‎src/value_and_place.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -327,7 +327,7 @@ impl<'tcx> CValue<'tcx> {
327327

328328
let val = match layout.ty.kind() {
329329
ty::Uint(UintTy::U128) | ty::Int(IntTy::I128) => {
330-
let const_val = const_val.assert_bits(layout.size);
330+
let const_val = const_val.to_bits(layout.size);
331331
let lsb = fx.bcx.ins().iconst(types::I64, const_val as u64 as i64);
332332
let msb = fx.bcx.ins().iconst(types::I64, (const_val >> 64) as u64 as i64);
333333
fx.bcx.ins().iconcat(lsb, msb)
@@ -339,7 +339,7 @@ impl<'tcx> CValue<'tcx> {
339339
| ty::Ref(..)
340340
| ty::RawPtr(..)
341341
| ty::FnPtr(..) => {
342-
let raw_val = const_val.size().truncate(const_val.assert_bits(layout.size));
342+
let raw_val = const_val.size().truncate(const_val.to_bits(layout.size));
343343
fx.bcx.ins().iconst(clif_ty, raw_val as i64)
344344
}
345345
ty::Float(FloatTy::F32) => {

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