Optimize sla a to add a,a.

Author: jacobly0

llvm/lib/Target/Z80/Z80InstrInfo.td

@@ -716,11 +716,11 @@ multiclass UnOp8RF<OtherPrefix prefix, bits<8> opcode, string mnemonic,
                    list<Predicate> Preds = []> {
   defvar   s = !cond(!eq(prefix, NoPre): "r", !eq(prefix, CBPre): "g");
   defvar rc8 = !cond(!eq(prefix, NoPre):  R8, !eq(prefix, CBPre):  G8);
-  def 8#s   : I <Pre<Idx0Pre, prefix>, opcode, mnemonic, "\t$dst", "$imp = $dst",
-                 (outs rc8:$dst), (ins rc8:$imp),
-                 [(set rc8:$dst, F,
-                         (!cast<SDNode>(!strconcat("Z80", mnemonic, "_flag"))
-                             rc8:$imp))]>,
+  def 8#s   : I<Pre<Idx0Pre, prefix>, opcode, mnemonic, "\t$dst", "$imp = $dst",
+                (outs rc8:$dst), (ins rc8:$imp),
+                [(set rc8:$dst, F,
+                        (!cast<SDNode>(!strconcat("Z80", mnemonic, "_flag"))
+                            rc8:$imp))]>,
               Requires<Preds>;
   let mayLoad = true, mayStore = true in {
     def 8p    : I <Pre<Idx0Pre, prefix>, opcode, mnemonic, "\t$adr", "",
@@ -746,11 +746,11 @@ multiclass UnOp8RFF<OtherPrefix prefix, bits<8> opcode, string mnemonic,
                     list<Predicate> Preds = []> {
   defvar   s = !cond(!eq(prefix, NoPre): "r", !eq(prefix, CBPre): "g");
   defvar rc8 = !cond(!eq(prefix, NoPre):  R8, !eq(prefix, CBPre):  G8);
-  def 8#s   : I <Pre<Idx0Pre, prefix>, opcode, mnemonic, "\t$dst", "$imp = $dst",
-                 (outs rc8:$dst), (ins rc8:$imp),
-                 [(set rc8:$dst, F,
-                         (!cast<SDNode>(!strconcat("Z80", mnemonic, "_flag"))
-                             rc8:$imp, F))]>,
+  def 8#s   : I<Pre<Idx0Pre, prefix>, opcode, mnemonic, "\t$dst", "$imp = $dst",
+                (outs rc8:$dst), (ins rc8:$imp),
+                [(set rc8:$dst, F,
+                        (!cast<SDNode>(!strconcat("Z80", mnemonic, "_flag"))
+                            rc8:$imp, F))]>,
               Requires<Preds>;
   let mayLoad = true, mayStore = true in {
     def 8p    : I <Pre<Idx0Pre, prefix>, opcode, mnemonic, "\t$adr", "",

llvm/lib/Target/Z80/Z80MachineLateOptimization.cpp

@@ -564,6 +564,17 @@ bool Z80MachineLateOptimization::runOnMachineFunction(MachineFunction &MF) {
         MIB.addReg(DstReg, RegState::Implicit | RegState::Undef);
         MIB.addReg(Z80::F, RegState::Implicit | getKillRegState(reuse(Z80::F)));
         break;
+      case Z80::SLA8g:
+        if (DstReg != Z80::A || !LiveUnits.available(Z80::F))
+          break;
+        LLVM_DEBUG(dbgs() << "Replacing: "; MIB->dump();
+                   dbgs() << "     With: ");
+        MIB->setDesc(TII.get(Z80::ADD8ar));
+        MIB->untieRegOperand(1);
+        MIB->getOperand(0).setImplicit();
+        MIB->getOperand(1).setImplicit();
+        MIB.addReg(DstReg, getKillRegState(MIB->getOperand(1).isKill()));
+        break;
       case Z80::RLC8g:
       case Z80::RRC8g:
       case Z80:: RL8g: