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Commit f7712e0

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DDEleDDEle
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XeTLA Support Compiler 2025.0 (#325)
1 parent f41a8c1 commit f7712e0

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15 files changed

+77
-68
lines changed

15 files changed

+77
-68
lines changed

‎include/common/core/barrier.hpp‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,11 @@ namespace gpu::xetla {
3333
template <uint8_t NbarCount>
3434
__XETLA_API void xetla_nbarrier_init() {
3535
if constexpr (NbarCount != 0) {
36+
#if __INTEL_LLVM_COMPILER >= 20250000
37+
__ESIMD_NS::named_barrier_init<NbarCount>();
38+
#else
3639
__ESIMD_ENS::named_barrier_init<NbarCount>();
40+
#endif
3741
}
3842
}
3943

@@ -55,8 +59,13 @@ __XETLA_API void named_barrier_signal(
5559
uint8_t producer_consumer_mode,
5660
uint32_t num_producers,
5761
uint32_t num_consumers) {
62+
#if __INTEL_LLVM_COMPILER >= 20250000
63+
__ESIMD_NS::named_barrier_signal(
64+
barrier_id, producer_consumer_mode, num_producers, num_consumers);
65+
#else
5866
__ESIMD_ENS::named_barrier_signal(
5967
barrier_id, producer_consumer_mode, num_producers, num_consumers);
68+
#endif
6069
}
6170

6271
/// @brief Wait on a named barrier.
@@ -65,7 +74,11 @@ __XETLA_API void named_barrier_signal(
6574
/// @param barrier_id [in] is the named barrier id.
6675
/// It’s value cannot exceed the total count of initialized named barriers.
6776
__XETLA_API void named_barrier_wait(uint8_t barrier_id) {
77+
#if __INTEL_LLVM_COMPILER >= 20250000
78+
__ESIMD_NS::named_barrier_wait(barrier_id);
79+
#else
6880
__ESIMD_ENS::named_barrier_wait(barrier_id);
81+
#endif
6982
}
7083

7184
/// @} xetla_core_barrier

‎include/common/core/bit_mask_manipulation.hpp‎

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,8 +49,13 @@ __XETLA_API xetla_vector<T0, SZ> xetla_shl(
4949
xetla_vector<T1, SZ> src0,
5050
U src1,
5151
Sat sat = {}) {
52+
#if __INTEL_LLVM_COMPILER >= 20250000
53+
return __ESIMD_NS::shl<T0, T1, SZ, U, typename Sat::sat_tag>(
54+
src0, src1, Sat::value);
55+
#else
5256
return __ESIMD_ENS::shl<T0, T1, SZ, U, typename Sat::sat_tag>(
5357
src0, src1, Sat::value);
58+
#endif
5459
}
5560

5661
/// Shift left operation (scalar version)
@@ -68,8 +73,13 @@ template <
6873
typename T2,
6974
class Sat = xetla_saturation_off_tag>
7075
typename std::remove_const<T0>::type xetla_shl(T1 src0, T2 src1, Sat sat = {}) {
76+
#if __INTEL_LLVM_COMPILER >= 20250000
77+
return __ESIMD_NS::shl<T0, T1, T2, typename Sat::sat_tag>(
78+
src0, src1, Sat::value);
79+
#else
7180
return __ESIMD_ENS::shl<T0, T1, T2, typename Sat::sat_tag>(
7281
src0, src1, Sat::value);
82+
#endif
7383
}
7484

7585
/// Shift right operation (vector version)
@@ -92,8 +102,13 @@ __XETLA_API xetla_vector<T0, SZ> xetla_shr(
92102
xetla_vector<T1, SZ> src0,
93103
U src1,
94104
Sat sat = {}) {
105+
#if __INTEL_LLVM_COMPILER >= 20250000
106+
return __ESIMD_NS::shr<T0, T1, SZ, U, typename Sat::sat_tag>(
107+
src0, src1, Sat::value);
108+
#else
95109
return __ESIMD_ENS::shr<T0, T1, SZ, U, typename Sat::sat_tag>(
96110
src0, src1, Sat::value);
111+
#endif
97112
}
98113

99114
/// Shift right operation (scalar version)
@@ -114,8 +129,13 @@ __XETLA_API typename std::remove_const<T0>::type xetla_shr(
114129
T1 src0,
115130
T2 src1,
116131
Sat sat = {}) {
132+
#if __INTEL_LLVM_COMPILER >= 20250000
133+
return __ESIMD_NS::shr<T0, T1, T2, typename Sat::sat_tag>(
134+
src0, src1, Sat::value);
135+
#else
117136
return __ESIMD_ENS::shr<T0, T1, T2, typename Sat::sat_tag>(
118137
src0, src1, Sat::value);
138+
#endif
119139
}
120140

121141
/// Rotate left operation with two vector inputs
@@ -130,7 +150,11 @@ template <typename T0, typename T1, int SZ>
130150
__XETLA_API xetla_vector<T0, SZ> xetla_rol(
131151
xetla_vector<T1, SZ> src0,
132152
xetla_vector<T1, SZ> src1) {
153+
#if __INTEL_LLVM_COMPILER >= 20250000
154+
return __ESIMD_NS::rol<T0, T1, SZ>(src0, src1);
155+
#else
133156
return __ESIMD_ENS::rol<T0, T1, SZ>(src0, src1);
157+
#endif
134158
}
135159

136160
/// Rotate left operation with a vector and a scalar inputs
@@ -147,7 +171,11 @@ __XETLA_API std::enable_if_t<
147171
std::is_integral<U>::value && is_xetla_scalar<U>::value,
148172
xetla_vector<T0, SZ>>
149173
xetla_rol(xetla_vector<T1, SZ> src0, U src1) {
174+
#if __INTEL_LLVM_COMPILER >= 20250000
175+
return __ESIMD_NS::rol<T0, T1, SZ, U>(src0, src1);
176+
#else
150177
return __ESIMD_ENS::rol<T0, T1, SZ, U>(src0, src1);
178+
#endif
151179
}
152180

153181
/// Rotate left operation with two scalar inputs
@@ -163,7 +191,11 @@ __XETLA_API std::enable_if_t<
163191
std::is_integral<T2>::value,
164192
remove_const_t<T0>>
165193
xetla_rol(T1 src0, T2 src1) {
194+
#if __INTEL_LLVM_COMPILER >= 20250000
195+
return __ESIMD_NS::rol<T0, T1, T2>(src0, src1);
196+
#else
166197
return __ESIMD_ENS::rol<T0, T1, T2>(src0, src1);
198+
#endif
167199
}
168200

169201
/// Rotate right operation with two vector inputs
@@ -178,7 +210,11 @@ template <typename T0, typename T1, int SZ>
178210
__XETLA_API xetla_vector<T0, SZ> xetla_ror(
179211
xetla_vector<T1, SZ> src0,
180212
xetla_vector<T1, SZ> src1) {
213+
#if __INTEL_LLVM_COMPILER >= 20250000
214+
return __ESIMD_NS::ror<T0, T1, SZ>(src0, src1);
215+
#else
181216
return __ESIMD_ENS::ror<T0, T1, SZ>(src0, src1);
217+
#endif
182218
}
183219

184220
/// Rotate right operation with a vector and a scalar inputs
@@ -195,7 +231,11 @@ __XETLA_API std::enable_if_t<
195231
std::is_integral<U>::value && is_xetla_scalar<U>::value,
196232
xetla_vector<T0, SZ>>
197233
xetla_ror(xetla_vector<T1, SZ> src0, U src1) {
234+
#if __INTEL_LLVM_COMPILER >= 20250000
235+
return __ESIMD_NS::ror<T0, T1, SZ, U>(src0, src1);
236+
#else
198237
return __ESIMD_ENS::ror<T0, T1, SZ, U>(src0, src1);
238+
#endif
199239
}
200240

201241
/// Rotate right operation with two scalar inputs
@@ -211,7 +251,11 @@ __XETLA_API std::enable_if_t<
211251
std::is_integral<T2>::value,
212252
remove_const_t<T0>>
213253
xetla_ror(T1 src0, T2 src1) {
254+
#if __INTEL_LLVM_COMPILER >= 20250000
255+
return __ESIMD_NS::ror<T0, T1, T2>(src0, src1);
256+
#else
214257
return __ESIMD_ENS::ror<T0, T1, T2>(src0, src1);
258+
#endif
215259
}
216260

217261
/// Logical Shift Right (vector version)
@@ -234,8 +278,13 @@ __XETLA_API xetla_vector<T0, SZ> xetla_lsr(
234278
xetla_vector<T1, SZ> src0,
235279
U src1,
236280
Sat sat = {}) {
281+
#if __INTEL_LLVM_COMPILER >= 20250000
282+
return __ESIMD_NS::lsr<T0, T1, SZ, U, typename Sat::sat_tag>(
283+
src0, src1, Sat::value);
284+
#else
237285
return __ESIMD_ENS::lsr<T0, T1, SZ, U, typename Sat::sat_tag>(
238286
src0, src1, Sat::value);
287+
#endif
239288
}
240289

241290
/// Logical Shift Right (scalar version)
@@ -257,8 +306,13 @@ __XETLA_API typename std::remove_const<T0>::type xetla_lsr(
257306
T1 src0,
258307
T2 src1,
259308
Sat sat = {}) {
309+
#if __INTEL_LLVM_COMPILER >= 20250000
310+
return __ESIMD_NS::lsr<T0, T1, T2, typename Sat::sat_tag>(
311+
src0, src1, Sat::value);
312+
#else
260313
return __ESIMD_ENS::lsr<T0, T1, T2, typename Sat::sat_tag>(
261314
src0, src1, Sat::value);
315+
#endif
262316
}
263317

264318
/// Arithmetical Shift Right (vector version)
@@ -281,8 +335,13 @@ __XETLA_API xetla_vector<T0, SZ> xetla_asr(
281335
xetla_vector<T1, SZ> src0,
282336
U src1,
283337
Sat sat = {}) {
338+
#if __INTEL_LLVM_COMPILER >= 20250000
339+
return __ESIMD_NS::asr<T0, T1, SZ, U, typename Sat::sat_tag>(
340+
src0, src1, Sat::value);
341+
#else
284342
return __ESIMD_ENS::asr<T0, T1, SZ, U, typename Sat::sat_tag>(
285343
src0, src1, Sat::value);
344+
#endif
286345
}
287346

288347
/// Arithmetical Shift Right (scalar version)
@@ -304,8 +363,13 @@ __XETLA_API typename std::remove_const<T0>::type xetla_asr(
304363
T1 src0,
305364
T2 src1,
306365
Sat sat = {}) {
366+
#if __INTEL_LLVM_COMPILER >= 20250000
367+
return __ESIMD_NS::asr<T0, T1, T2, typename Sat::sat_tag>(
368+
src0, src1, Sat::value);
369+
#else
307370
return __ESIMD_ENS::asr<T0, T1, T2, typename Sat::sat_tag>(
308371
src0, src1, Sat::value);
372+
#endif
309373
}
310374

311375
/// Pack a xetla_mask into a single unsigned 32-bit integer value.

‎include/common/core/common.hpp‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -272,11 +272,6 @@ enum class reduce_op : uint8_t {
272272
max = 3, // performance reduce_max
273273
};
274274

275-
/// SW_BARRIER, insert software scheduling barrier, for better code control
276-
///
277-
278-
#define SW_BARRIER() __ESIMD_NS::fence<__ESIMD_NS::fence_mask::sw_barrier>()
279-
280275
__XETLA_API void xetla_wait(uint16_t val) {
281276
__ESIMD_ENS::wait(__ESIMD_NS::simd<uint16_t, 1>(val));
282277
}

‎include/common/utils/misc.hpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,6 @@ __XETLA_API xetla_vector<dtype_acc, N> drop_out(
9292
dtype_acc scale) {
9393
xetla_vector<dtype_acc, N> out = in * scale;
9494
constexpr uint32_t unroll_size = num_flag * 16;
95-
SW_BARRIER();
9695
#pragma unroll
9796
for (uint32_t i = 0; i < N / unroll_size; i++) {
9897
xetla_mask<unroll_size> mask_flag =

‎include/experimental/group/fused_op/layer_norm_fused_op_bwd_xe.hpp‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -236,7 +236,6 @@ struct ln_bwd_fused_op_t<
236236
dx_resAdd_out_payload.update_tdesc(wg_num_m * wg_tile_m * mat_ld);
237237
if (dropout_prob != 0) {
238238
subgroup::tile_load(mask_in, mask_in_payload);
239-
SW_BARRIER();
240239
mask_in_payload.update_tdesc(wg_num_m * wg_tile_m * mask_ld);
241240
output = drop_out<dtype_acc, sg_tile_n>(
242241
output, mask_in.reg, dropout_scale_inv);
@@ -368,7 +367,6 @@ struct ln_bwd_fused_op_t<
368367
if (dropout_prob != 0) {
369368
// dropout
370369
subgroup::tile_load(mask_in, mask_in_payload);
371-
SW_BARRIER();
372370
mask_in_payload.update_tdesc(wg_num_m * wg_tile_m * mask_ld);
373371
output = drop_out<dtype_acc, sg_tile_n>(
374372
output, mask_in.reg, dropout_scale_inv);
@@ -479,7 +477,6 @@ struct ln_bwd_fused_op_t<
479477
xetla_vector<dtype_acc, sg_tile_n> output;
480478
// dropout
481479
subgroup::tile_load(mask_in, mask_in_payload);
482-
SW_BARRIER();
483480
mask_in_payload.update_tdesc(wg_num_m * wg_tile_m * mask_ld);
484481
output =
485482
drop_out<dtype_acc, sg_tile_n>(input, mask_in.reg, dropout_scale_inv);

‎include/experimental/group/fused_op/layer_norm_fused_op_fwd_xe.hpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -255,7 +255,6 @@ struct ln_fwd_fused_op_t<
255255
if (dropout_prob != 0) {
256256
// dropout
257257
subgroup::tile_load(mask_in, mask_in_payload);
258-
SW_BARRIER();
259258
if constexpr (n_chunks == 1) {
260259
mask_in_payload.update_tdesc(wg_num_m * wg_tile_m * mask_ld);
261260
} else {
@@ -389,7 +388,6 @@ struct ln_fwd_fused_op_t<
389388
xetla_vector<dtype_acc, chunk_size> input) {
390389
// dropout
391390
subgroup::tile_load(mask_in, mask_in_payload);
392-
SW_BARRIER();
393391
if constexpr (n_chunks == 1) {
394392
mask_in_payload.update_tdesc(wg_num_m * wg_tile_m * mask_ld);
395393
} else {

‎include/experimental/group/fused_op/row_reduction_fused_op_xe.hpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -253,7 +253,6 @@ struct row_reduction_fused_op_t<
253253
mask_in_t mask_in;
254254
mask_in_payload_t mask_in_payload(mask_load_base_desc);
255255
subgroup::tile_load(mask_in, mask_in_payload);
256-
SW_BARRIER();
257256
matAcc.reg = drop_out<dtype_acc, tile_size_x * tile_size_y>(
258257
matAcc.reg, mask_in.reg, dropout_scale_inv);
259258
}

‎include/experimental/group/gemm/impl/int4_dequantize_xe.hpp‎

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -518,7 +518,6 @@ class gemm_t<
518518
stages < args.inner_loop_count ? args.inner_loop_count - stages : 0;
519519
uint32_t compute_stages =
520520
stages < args.inner_loop_count ? stages : args.inner_loop_count;
521-
SW_BARRIER();
522521
for (uint32_t i = 0; i < prefetch_stages; i++) {
523522
subgroup::tile_prefetch<cache_hint::cached, cache_hint::cached>(
524523
matA_prefetch_payload);
@@ -573,7 +572,6 @@ class gemm_t<
573572
zero_pt, zero_pt_payload);
574573
}
575574
tile_k_idx++;
576-
SW_BARRIER();
577575
if constexpr (stages != 0) {
578576
subgroup::tile_prefetch<cache_hint::cached, cache_hint::cached>(
579577
matA_prefetch_payload);
@@ -589,7 +587,6 @@ class gemm_t<
589587
}
590588
scale_prefetch_addr_i++;
591589
}
592-
SW_BARRIER();
593590
matA_payload.template update_tdesc<update_dir_a>(matA_t::tile_size_x);
594591
matB_payload.template update_tdesc<update_dir_b>(matB_t::tile_size_y);
595592
if (tile_k_idx % scale_addr_update_freq == 0) {
@@ -616,7 +613,6 @@ class gemm_t<
616613
}
617614
}
618615
}
619-
SW_BARRIER();
620616
matA_acc_t matA_acc;
621617
matB_acc_t matB_acc;
622618
if constexpr (is_vnni_tiled_a) {
@@ -625,7 +621,6 @@ class gemm_t<
625621
subgroup::elemwise_cvt(matA_acc, matA);
626622

627623
dequantize(matB_acc, matB, scale, zero_pt, dequantize_args);
628-
SW_BARRIER();
629624
if constexpr (is_gemv) {
630625
tile_mma::mma(
631626
matAcc,
@@ -640,7 +635,6 @@ class gemm_t<
640635
}
641636
tile_mma::mma(matC, matC, matB_acc, matA_acc);
642637
}
643-
SW_BARRIER();
644638
if constexpr (enable_periodic_sync) {
645639
if ((i % sync_freq) == 0) {
646640
if constexpr (wg_size_x > 1) {
@@ -654,7 +648,6 @@ class gemm_t<
654648
}
655649
}
656650
}
657-
SW_BARRIER();
658651
for (uint32_t i = 0; i < compute_stages; i++) {
659652
if constexpr (enable_periodic_sync) {
660653
if ((i % sync_freq) == 0) {
@@ -681,7 +674,6 @@ class gemm_t<
681674
zero_pt, zero_pt_payload);
682675
}
683676
tile_k_idx++;
684-
SW_BARRIER();
685677
matA_payload.template update_tdesc<update_dir_a>(matA_t::tile_size_x);
686678
matB_payload.template update_tdesc<update_dir_b>(matB_t::tile_size_y);
687679
if (tile_k_idx % scale_addr_update_freq == 0) {
@@ -693,7 +685,6 @@ class gemm_t<
693685
zero_pt_t::tile_size_y);
694686
}
695687
}
696-
SW_BARRIER();
697688
matA_acc_t matA_acc;
698689
matB_acc_t matB_acc;
699690
if constexpr (is_vnni_tiled_a) {
@@ -702,7 +693,6 @@ class gemm_t<
702693
subgroup::elemwise_cvt(matA_acc, matA);
703694

704695
dequantize(matB_acc, matB, scale, zero_pt, dequantize_args);
705-
SW_BARRIER();
706696
if constexpr (is_gemv) {
707697
tile_mma::mma(
708698
matAcc, matAcc, matC, matB_acc, matA_acc, i == compute_stages - 1);
@@ -712,7 +702,6 @@ class gemm_t<
712702
}
713703
tile_mma::mma(matC, matC, matB_acc, matA_acc);
714704
}
715-
SW_BARRIER();
716705
if constexpr (enable_periodic_sync) {
717706
if ((i % sync_freq) == 0) {
718707
if constexpr (wg_size_x > 1) {
@@ -726,7 +715,6 @@ class gemm_t<
726715
}
727716
}
728717
}
729-
SW_BARRIER();
730718
}
731719

732720
private:

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