[DevASAN] Fix addrspace mismatch issue caused by pulldown (#32824)

JIRA: CMPLRLLVM-71162

Author: zhaomaosu

llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp

@@ -4566,19 +4566,22 @@ void FunctionStackPoisoner::processStaticAllocas() {
     LocalStackBaseAlloca = LocalStackBase;
   }
 
+  const auto &TargetTriple = Triple(F.getParent()->getTargetTriple());
+
   // Replace Alloca instructions with base+offset.
   SmallVector<Value *> NewAllocaPtrs;
   for (const auto &Desc : SVD) {
     AllocaInst *AI = Desc.AI;
     replaceDbgDeclare(AI, LocalStackBaseAlloca, DIB, DIExprFlags, Desc.Offset);
     Value *NewAllocaPtr = IRB.CreatePtrAdd(
         LocalStackBase, ConstantInt::get(IntptrTy, Desc.Offset));
+    NewAllocaPtr = TargetTriple.isSPIROrSPIRV()
+                       ? IRB.CreateAddrSpaceCast(NewAllocaPtr, AI->getType())
+                       : NewAllocaPtr;
     AI->replaceAllUsesWith(NewAllocaPtr);
     NewAllocaPtrs.push_back(NewAllocaPtr);
   }
 
-  const auto &TargetTriple = Triple(F.getParent()->getTargetTriple());
-
   // The left-most redzone has enough space for at least 4 pointers.
   // SPIRV doesn't use the following metadata
   if (!TargetTriple.isSPIROrSPIRV()) {

llvm/test/Instrumentation/AddressSanitizer/SPIRV/byval_arg.ll

@@ -8,7 +8,9 @@ target triple = "spir64-unknown-unknown"
 ; Function Attrs: sanitize_address
 define spir_func void @test(ptr addrspace(4) byval(%struct.Input) %input) #0 {
 entry:
-  ; CHECK: inttoptr i64 %1 to ptr addrspace(4)
+  ; CHECK: [[REG1:%[0-9]+]] = getelementptr i8, ptr %MyAlloca
+  ; CHECK: [[REG2:%[0-9]+]] = addrspacecast ptr [[REG1]] to ptr addrspace(4)
+  ; CHECK: call void @llvm.memcpy.p4.p4.i64(ptr addrspace(4) align 4 [[REG2]], ptr addrspace(4) align 4 %input, i64 44, i1 false)
   ret void
 }
 

llvm/test/Instrumentation/AddressSanitizer/SPIRV/instrument_private_address_space.ll

@@ -20,16 +20,20 @@ define spir_kernel void @kernel() #0 {
 ; CHECK-LABEL: define spir_kernel void @kernel
 entry:
   %p.i = alloca [4 x i32], align 4
-  ; CHECK: %shadow_ptr = call i64 @__asan_mem_to_shadow(i64 %0, i32 0)
-  ; CHECK: call void @__asan_set_shadow_private(i64 %4, i64 2, i8 -15)
-  ; CHECK: call void @__asan_set_shadow_private(i64 %5, i64 1, i8 -13)
+  ; CHECK: %shadow_ptr = call i64 @__asan_mem_to_shadow
+  ; CHECK: [[REG1:%[0-9]+]] = add i64 %shadow_ptr, 0
+  ; CHECK: call void @__asan_set_shadow_private(i64 [[REG1]], i64 2, i8 -15)
+  ; CHECK: [[REG2:%[0-9]+]] = add i64 %shadow_ptr, 3
+  ; CHECK: call void @__asan_set_shadow_private(i64 [[REG2]], i64 1, i8 -13)
   call void @llvm.lifetime.start.p0(ptr nonnull %p.i)
   call void @llvm.memcpy.p0.p1.i64(ptr align 4 %p.i, ptr addrspace(1) align 4 @__const._ZZZ4mainENKUlRN4sycl3_V17handlerEE_clES2_ENKUlvE_clEv.p, i64 16, i1 false)
   %arraydecay.i = getelementptr inbounds [4 x i32], ptr %p.i, i64 0, i64 0
   %0 = addrspacecast ptr %arraydecay.i to ptr addrspace(4)
   %call.i = call spir_func i32 @_Z3fooPii(ptr addrspace(4) %0)
-  ; CHECK: call void @__asan_set_shadow_private(i64 %7, i64 2, i8 0)
-  ; CHECK: call void @__asan_set_shadow_private(i64 %8, i64 1, i8 0)
+  ; CHECK: [[REG3:%[0-9]+]] = add i64 %shadow_ptr, 0
+  ; CHECK: call void @__asan_set_shadow_private(i64 [[REG3]], i64 2, i8 0)
+  ; CHECK: [[REG4:%[0-9]+]] = add i64 %shadow_ptr, 3
+  ; CHECK: call void @__asan_set_shadow_private(i64 [[REG4]], i64 1, i8 0)
   ret void
 }