From d067506cbbd56689001c9d0772b96a8e694a565c Mon Sep 17 00:00:00 2001 From: Alex Baden Date: Tue, 26 Nov 2024 13:23:46 +0000 Subject: [PATCH] Permute the pass pipeline to coalesce before setting up the matmul --- third_party/intel/backend/compiler.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/third_party/intel/backend/compiler.py b/third_party/intel/backend/compiler.py index 273734fdb6..41c7ea514a 100644 --- a/third_party/intel/backend/compiler.py +++ b/third_party/intel/backend/compiler.py @@ -239,6 +239,10 @@ def make_ttgir(mod, metadata, opt, properties): return XPUBackend.AdvancedPath.make_ttgir(mod, metadata, opt) passes.ttir.add_convert_to_ttgpuir(pm, "xpu", opt.num_warps, opt.threads_per_warp, opt.num_ctas) + # optimize TTGIR + intel.passes.ttgpuir.add_coalesce(pm) + intel.passes.ttgpuir.add_remove_layout_conversions(pm) + intel.passes.ttgpuir.add_accelerate_matmul(pm) intel.passes.ttgpuir.add_remove_layout_conversions(pm) intel.passes.ttgpuir.add_materialize_block_pointer(pm) @@ -246,8 +250,6 @@ def make_ttgir(mod, metadata, opt, properties): intel.passes.ttgpuir.add_rewrite_tensor_pointer(pm) intel.passes.ttgpuir.add_pipeline(pm, opt.num_stages, False) - intel.passes.ttgpuir.add_coalesce(pm) - intel.passes.ttgpuir.add_remove_layout_conversions(pm) passes.ttgpuir.add_optimize_thread_locality(pm) passes.ttgpuir.add_optimize_dot_operands(pm, True) passes.common.add_cse(pm)