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1 parent efc8e2a commit 1b5a55aCopy full SHA for 1b5a55a
third_party/intel/lib/TritonIntelGPUTransforms/AccelerateMatmul.cpp
@@ -120,14 +120,13 @@ class BlockedToDPAS : public OpRewritePattern<tt::DotOp> {
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SmallVector<unsigned> order = {0, 1};
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Operation *aOp = a.getDefiningOp();
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- if (isa<ttg::ConvertLayoutOp>(aOp)) {
+ if (aOp && isa<ttg::ConvertLayoutOp>(aOp)) {
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auto valueToConvert = aOp->getOperand(0);
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aOp = valueToConvert.getDefiningOp();
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}
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if (aOp && isa<tt::LoadOp>(aOp)) {
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- Attribute layout;
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assert(aOp->getNumResults() == 1);
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- layout =
+ Attribute layout =
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cast<RankedTensorType>(aOp->getResult(0).getType()).getEncoding();
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order = triton::gpu::getOrder(layout);
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