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This repository was archived by the owner on Jul 6, 2019. It is now read-only.

Commit 150e7df

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bgamaribgamari
committed
Merge branch 'master' of https://github.com/hackndev/zinc
Conflicts: src/zinc/hal/k20/pin.rs src/zinc/hal/lpc17xx/pin.rs
2 parents de81cf0 + b3b68ce commit 150e7df

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8 files changed

+57
-52
lines changed

8 files changed

+57
-52
lines changed

‎Rakefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ compile_rust :rlibc_crate, {
3939
compile_rust :core_crate, {
4040
source: 'thirdparty/libcore/lib.rs'.in_root,
4141
produce: 'thirdparty/libcore/lib.rs'.in_root.as_rlib.in_build,
42+
flags: '--cfg no_fail_fmt',
4243
out_dir: true,
4344
recompile_on: :triple,
4445
}

‎apps/app_blink_k20.rs‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,11 @@ pub unsafe fn main() {
4040
systick::enable();
4141
loop {
4242
led1.set_high();
43-
wait(10);
43+
let a = match led1.level() {
44+
High => 1,
45+
Low => 0
46+
};
47+
wait(10 / a);
4448
led1.set_low();
4549
wait(10);
4650
}

‎apps/app_blink_stm32l1.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ extern crate zinc;
88
#[no_mangle]
99
pub unsafe fn main() {
1010
use core::default::Default;
11-
use zinc::hal::pin::GPIO;
11+
use zinc::hal::pin::Gpio;
1212
use zinc::hal::stm32l1::{init, pin, timer};
1313
use zinc::hal::timer::Timer;
1414
zinc::hal::mem_init::init_stack();

‎src/zinc/drivers/dht22_pt.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ fn build_dht22(builder: &mut Builder, cx: &mut ExtCtxt, node: Rc<node::Node>) {
5959
let ty_params = vec!(
6060
"'a".to_string(),
6161
"zinc::hal::timer::Timer".to_string(),
62-
"zinc::hal::pin::GPIO".to_string());
62+
"zinc::hal::pin::Gpio".to_string());
6363
node.set_type_params(ty_params);
6464

6565
let st = quote_stmt!(&*cx,

‎src/zinc/hal/k20/pin.rs‎

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -129,21 +129,21 @@ impl Pin {
129129

130130
fn gpioreg(&self) -> &'static reg::Gpio {
131131
match self.port {
132-
PortA => &reg::GpioA,
133-
PortB => &reg::GpioB,
134-
PortC => &reg::GpioC,
135-
PortD => &reg::GpioD,
136-
PortE => &reg::GpioE,
132+
PortA => &reg::GPIO_A,
133+
PortB => &reg::GPIO_B,
134+
PortC => &reg::GPIO_C,
135+
PortD => &reg::GPIO_D,
136+
PortE => &reg::GPIO_E,
137137
}
138138
}
139139

140140
fn pcr(&self) -> &'static reg::Port_pcr {
141141
let port: &reg::Port = match self.port {
142-
PortA => &reg::PortA,
143-
PortB => &reg::PortB,
144-
PortC => &reg::PortC,
145-
PortD => &reg::PortD,
146-
PortE => &reg::PortE,
142+
PortA => &reg::PORT_A,
143+
PortB => &reg::PORT_B,
144+
PortC => &reg::PORT_C,
145+
PortD => &reg::PORT_D,
146+
PortE => &reg::PORT_E,
147147
};
148148
return &port.pcr[self.pin as uint];
149149
}
@@ -236,11 +236,11 @@ pub mod reg {
236236
})
237237

238238
extern {
239-
#[link_name="k20_iomem_PORTA"] pub static PortA: Port;
240-
#[link_name="k20_iomem_PORTB"] pub static PortB: Port;
241-
#[link_name="k20_iomem_PORTC"] pub static PortC: Port;
242-
#[link_name="k20_iomem_PORTD"] pub static PortD: Port;
243-
#[link_name="k20_iomem_PORTE"] pub static PortE: Port;
239+
#[link_name="k20_iomem_PORTA"] pub static PORT_A: Port;
240+
#[link_name="k20_iomem_PORTB"] pub static PORT_B: Port;
241+
#[link_name="k20_iomem_PORTC"] pub static PORT_C: Port;
242+
#[link_name="k20_iomem_PORTD"] pub static PORT_D: Port;
243+
#[link_name="k20_iomem_PORTE"] pub static PORT_E: Port;
244244
}
245245

246246
ioregs!(Gpio = {
@@ -273,10 +273,10 @@ pub mod reg {
273273
})
274274

275275
extern {
276-
#[link_name="k20_iomem_GPIOA"] pub static GpioA: Gpio;
277-
#[link_name="k20_iomem_GPIOB"] pub static GpioB: Gpio;
278-
#[link_name="k20_iomem_GPIOC"] pub static GpioC: Gpio;
279-
#[link_name="k20_iomem_GPIOD"] pub static GpioD: Gpio;
280-
#[link_name="k20_iomem_GPIOE"] pub static GpioE: Gpio;
276+
#[link_name="k20_iomem_GPIOA"] pub static GPIO_A: Gpio;
277+
#[link_name="k20_iomem_GPIOB"] pub static GPIO_B: Gpio;
278+
#[link_name="k20_iomem_GPIOC"] pub static GPIO_C: Gpio;
279+
#[link_name="k20_iomem_GPIOD"] pub static GPIO_D: Gpio;
280+
#[link_name="k20_iomem_GPIOE"] pub static GPIO_E: Gpio;
281281
}
282282
}

‎src/zinc/hal/lpc17xx/pin.rs‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -84,11 +84,11 @@ impl Pin {
8484

8585
fn gpioreg(&self) -> &reg::Gpio {
8686
match self.port {
87-
Port0 => &reg::Gpio0,
88-
Port1 => &reg::Gpio1,
89-
Port2 => &reg::Gpio2,
90-
Port3 => &reg::Gpio3,
91-
Port4 => &reg::Gpio4,
87+
Port0 => &reg::GPIO_0,
88+
Port1 => &reg::GPIO_1,
89+
Port2 => &reg::GPIO_2,
90+
Port3 => &reg::GPIO_3,
91+
Port4 => &reg::GPIO_4,
9292
}
9393
}
9494

@@ -188,10 +188,10 @@ mod reg {
188188
reg_rw!(Gpio, u32, FIOCLR, set_FIOCLR, FIOCLR)
189189

190190
extern {
191-
#[link_name="lpc17xx_iomem_GPIO0"] pub static Gpio0: Gpio;
192-
#[link_name="lpc17xx_iomem_GPIO1"] pub static Gpio1: Gpio;
193-
#[link_name="lpc17xx_iomem_GPIO2"] pub static Gpio2: Gpio;
194-
#[link_name="lpc17xx_iomem_GPIO3"] pub static Gpio3: Gpio;
195-
#[link_name="lpc17xx_iomem_GPIO4"] pub static Gpio4: Gpio;
191+
#[link_name="lpc17xx_iomem_GPIO0"] pub static GPIO_0: Gpio;
192+
#[link_name="lpc17xx_iomem_GPIO1"] pub static GPIO_1: Gpio;
193+
#[link_name="lpc17xx_iomem_GPIO2"] pub static GPIO_2: Gpio;
194+
#[link_name="lpc17xx_iomem_GPIO3"] pub static GPIO_3: Gpio;
195+
#[link_name="lpc17xx_iomem_GPIO4"] pub static GPIO_4: Gpio;
196196
}
197197
}

‎src/zinc/hal/lpc17xx/pin_pt.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ fn build_pin(builder: &mut Builder, cx: &mut ExtCtxt, node: Rc<node::Node>) {
8686

8787
let port_def = pinmap::port_def();
8888
let function_str = match node.get_string_attr("function") {
89-
None => "GPIO".to_string(),
89+
None => "Gpio".to_string(),
9090
Some(fun) => {
9191
let pins = &port_def[*port_path];
9292
let maybe_pin_index = from_str(node.path.as_slice()).unwrap();

‎src/zinc/hal/stm32f4/pin.rs‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -120,15 +120,15 @@ impl PinConf {
120120

121121
fn get_reg(&self) -> &reg::GPIO {
122122
match self.port {
123-
PortA => &reg::GPIOA,
124-
PortB => &reg::GPIOB,
125-
PortC => &reg::GPIOC,
126-
PortD => &reg::GPIOD,
127-
PortE => &reg::GPIOE,
128-
PortF => &reg::GPIOF,
129-
PortG => &reg::GPIOG,
130-
PortH => &reg::GPIOH,
131-
PortI => &reg::GPIOI,
123+
PortA => &reg::GPIO_A,
124+
PortB => &reg::GPIO_B,
125+
PortC => &reg::GPIO_C,
126+
PortD => &reg::GPIO_D,
127+
PortE => &reg::GPIO_E,
128+
PortF => &reg::GPIO_F,
129+
PortG => &reg::GPIO_G,
130+
PortH => &reg::GPIO_H,
131+
PortI => &reg::GPIO_I,
132132
}
133133
}
134134
}
@@ -150,15 +150,15 @@ mod reg {
150150
reg_rw!(GPIO, u32, AFRH, set_AFRH, AFRH)
151151

152152
extern {
153-
#[link_name="stm32f4_iomem_GPIOA"] pub static GPIOA: GPIO;
154-
#[link_name="stm32f4_iomem_GPIOB"] pub static GPIOB: GPIO;
155-
#[link_name="stm32f4_iomem_GPIOC"] pub static GPIOC: GPIO;
156-
#[link_name="stm32f4_iomem_GPIOD"] pub static GPIOD: GPIO;
157-
#[link_name="stm32f4_iomem_GPIOE"] pub static GPIOE: GPIO;
158-
#[link_name="stm32f4_iomem_GPIOF"] pub static GPIOF: GPIO;
159-
#[link_name="stm32f4_iomem_GPIOG"] pub static GPIOG: GPIO;
160-
#[link_name="stm32f4_iomem_GPIOH"] pub static GPIOH: GPIO;
161-
#[link_name="stm32f4_iomem_GPIOI"] pub static GPIOI: GPIO;
153+
#[link_name="stm32f4_iomem_GPIOA"] pub static GPIO_A: GPIO;
154+
#[link_name="stm32f4_iomem_GPIOB"] pub static GPIO_B: GPIO;
155+
#[link_name="stm32f4_iomem_GPIOC"] pub static GPIO_C: GPIO;
156+
#[link_name="stm32f4_iomem_GPIOD"] pub static GPIO_D: GPIO;
157+
#[link_name="stm32f4_iomem_GPIOE"] pub static GPIO_E: GPIO;
158+
#[link_name="stm32f4_iomem_GPIOF"] pub static GPIO_F: GPIO;
159+
#[link_name="stm32f4_iomem_GPIOG"] pub static GPIO_G: GPIO;
160+
#[link_name="stm32f4_iomem_GPIOH"] pub static GPIO_H: GPIO;
161+
#[link_name="stm32f4_iomem_GPIOI"] pub static GPIO_I: GPIO;
162162
// define_reg!(GPIO_J: GPIO @ 0x40022400)
163163
// define_reg!(GPIO_K: GPIO @ 0x40022800)
164164
}

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