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positron96h2zero
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h2zero
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Add support for nRF52810 (#46)
* Add support for nRF52810 --------- Co-authored-by: h2zero <powell.rg@gmail.com>
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‎boards.txt‎

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@@ -1953,3 +1953,58 @@ Waveshare_BLE400.menu.cppDbgLvl.debug.build.cpp_debug=4
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Waveshare_BLE400.menu.bootloader.none=No bootloader
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Waveshare_BLE400.menu.bootloader.none.bootloader.flags=
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Waveshare_BLE400.menu.bootloader.none.build.bootloader.file=tools/none_bootloader.hex
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# nRF52810 variants
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###################
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Generic_nRF52810.name=Generic nRF52810
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Generic_nRF52810.upload.tool=openocd
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Generic_nRF52810.upload.target=nrf52
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Generic_nRF52810.upload.jlink_device=nRF52810_xxAA
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Generic_nRF52810.upload.maximum_size=180224
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Generic_nRF52810.bootloader.tool=openocd
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Generic_nRF52810.build.mcu=cortex-m4
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Generic_nRF52810.build.f_cpu=64000000
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Generic_nRF52810.build.board=GENERIC
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Generic_nRF52810.build.core=nRF5
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Generic_nRF52810.build.variant=Generic
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Generic_nRF52810.build.variant_system_lib=
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Generic_nRF52810.build.float_flags=
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Generic_nRF52810.build.ldscript=nRF52810_xxaa.ld
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Generic_nRF52810.build.extra_flags=-DNRF52_SERIES -DnRF52810_XXAA {bootloader.flags} -DCONFIG_NIMBLE_CPP_LOG_LEVEL={build.cpp_debug} {build.nimble_flags}
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Generic_nRF52810.menu.lfclk.lfxo=Crystal Oscillator
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Generic_nRF52810.menu.lfclk.lfxo.build.lfclk_flags=-DUSE_LFXO
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Generic_nRF52810.menu.lfclk.lfrc=RC Oscillator
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Generic_nRF52810.menu.lfclk.lfrc.build.lfclk_flags=-DUSE_LFRC
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Generic_nRF52810.menu.lfclk.lfsynt=Synthesized
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Generic_nRF52810.menu.lfclk.lfsynt.build.lfclk_flags=-DUSE_LFSYNT
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Generic_nRF52810.menu.role.all=All
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Generic_nRF52810.menu.role.all.build.nimble_flags=
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Generic_nRF52810.menu.role.periph=Peripheral
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Generic_nRF52810.menu.role.periph.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_OBSERVER_DISABLED
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Generic_nRF52810.menu.role.adv=Advertiser
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Generic_nRF52810.menu.role.adv.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_OBSERVER_DISABLED -DCONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED
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Generic_nRF52810.menu.role.scan=Scanner
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Generic_nRF52810.menu.role.scan.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED
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Generic_nRF52810.menu.role.central=Client
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Generic_nRF52810.menu.role.central.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_BROADCASTER_DISABLED
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Generic_nRF52810.menu.cppDbgLvl.none=None
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Generic_nRF52810.menu.cppDbgLvl.none.build.cpp_debug=0
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Generic_nRF52810.menu.cppDbgLvl.error=Error
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Generic_nRF52810.menu.cppDbgLvl.error.build.cpp_debug=1
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Generic_nRF52810.menu.cppDbgLvl.warn=Warn
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Generic_nRF52810.menu.cppDbgLvl.warn.build.cpp_debug=2
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Generic_nRF52810.menu.cppDbgLvl.info=Info
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Generic_nRF52810.menu.cppDbgLvl.info.build.cpp_debug=3
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Generic_nRF52810.menu.cppDbgLvl.debug=Debug
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Generic_nRF52810.menu.cppDbgLvl.debug.build.cpp_debug=4
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Generic_nRF52810.menu.bootloader.none=No bootloader
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Generic_nRF52810.menu.bootloader.none.bootloader.flags=
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Generic_nRF52810.menu.bootloader.none.build.bootloader.file=tools/none_bootloader.hex

‎cores/nRF5/Uart.cpp‎

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@@ -21,6 +21,15 @@
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#include "Arduino.h"
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#include "wiring_private.h"
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// these nRF52s have different UART PSEL definition
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#if defined(NRF52810_XXAA) || defined(NRF52805_XXAA) \
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|| defined(NRF52811_XXAA) || defined(NRF52833_XXAA) \
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|| defined(NRF52840_XXAA)
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#define PSELTXD PSEL.TXD
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#define PSELRXD PSEL.RXD
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#define PSELCTS PSEL.CTS
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#define PSELRTS PSEL.RTS
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#endif
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void serialEventRun(void)
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{

‎cores/nRF5/freertos/port.c‎

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@@ -205,9 +205,11 @@ void xPortPendSVHandler( void )
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" ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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#if (__FPU_PRESENT == 1U)
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" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */
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" it eq \n"
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" vstmdbeq r0!, {s16-s31} \n"
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#endif
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" \n"
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" stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */
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" \n"
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" \n"
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" ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */
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" \n"
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#if (__FPU_PRESENT == 1U)
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" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */
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" it eq \n"
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" vldmiaeq r0!, {s16-s31} \n"
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#endif
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" \n"
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" msr psp, r0 \n"
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" isb \n"

‎cores/nRF5/freertos/port_nrf52.c‎

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#include "app_util_platform.h"
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#endif
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#if !(__FPU_USED) && !(__LINT__)
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#error This port can only be used when the project options are configured to enable hardware floating point support.
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#endif
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//* see https://devzone.nordicsemi.com/f/nordic-q-a/30103/freertos-on-nrf52810
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// #if !(__FPU_USED) && !(__LINT__)
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// #error This port can only be used when the project options are configured to enable hardware floating point support.
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// #endif
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#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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/* Ensure the VFP is enabled - it should be anyway. */
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vPortEnableVFP();
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#if (__FPU_PRESENT == 1U)
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/* Lazy save always. */
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FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;
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#endif
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/* Finally this port requires SEVONPEND to be active */
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SCB->SCR |= SCB_SCR_SEVONPEND_Msk;

‎cores/nRF5/freertos/port_nrf52_systick.c‎

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@@ -242,13 +242,15 @@ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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else
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#endif
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{
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#if (__FPU_PRESENT == 1U)
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// Fix ERRATA 87 (https://infocenter.nordicsemi.com/index.jsp?topic=%252Fcom.nordic.infocenter.sdk5.v11.0.0%252Findex.html&cp=4_0_0)
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// Clear FPU interrupt before going to sleep. This prevent unexpected wake-up.
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#define FPU_EXCEPTION_MASK 0x0000009F
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/* Clear exceptions and PendingIRQ from the FPU unit */
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__set_FPSCR(__get_FPSCR() & ~(FPU_EXCEPTION_MASK));
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(void) __get_FPSCR();
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NVIC_ClearPendingIRQ(FPU_IRQn);
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#endif
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/* No SD - we would just block interrupts globally.
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* BASEPRI cannot be used for that because it would prevent WFE from wake up.

‎cores/nRF5/nimble_config/ext_nimble_config.h‎

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#if defined(NRF51)
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#include "nrf51_nimconfig.h"
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#elif defined(NRF52810_XXAA)
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#include "nrf52810_nimconfig.h"
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#elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
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#include "nrf52832_nimconfig.h"
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#elif defined(NRF52833_XXAA)

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