From dcd6722896b0133332943ec92750b228364af26f Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Mon, 23 May 2022 09:12:40 +0200
Subject: [PATCH 01/14] Makefile and similar: Prepare update to RTEMS 6

---
 .gitignore     |  1 +
 Makefile       | 59 ++++++++++----------------------------------------
 demo/Makefile  |  2 +-
 src/bsp.mk     |  2 +-
 src/config.ini | 46 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 61 insertions(+), 49 deletions(-)
 create mode 100644 src/config.ini

diff --git a/.gitignore b/.gitignore
index 37e77f6..b0b8d59 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,6 +1,7 @@
 /external/fdt/*.tar.gz
 /fdt/b-dtb
 /rtems/5
+/rtems/6
 build
 /demo*/b-*/
 external/libinih/b-imx7
diff --git a/Makefile b/Makefile
index 3000037..1f312e0 100644
--- a/Makefile
+++ b/Makefile
@@ -7,7 +7,7 @@ MAKEFILE_DIR = $(dir $(realpath $(firstword $(MAKEFILE_LIST))))
 ARCH = arm
 BSP = imx7
 BSP_GRISP1 = atsamv
-RTEMS_VERSION = 5
+RTEMS_VERSION = 6
 TARGET = $(ARCH)-rtems$(RTEMS_VERSION)
 PREFIX = $(MAKEFILE_DIR)/rtems/$(RTEMS_VERSION)
 RSB = $(MAKEFILE_DIR)/external/rtems-source-builder
@@ -83,7 +83,7 @@ help:
 
 .PHONY: install
 #H Build and install the complete toolchain, libraries, fdt and so on.
-install: submodule-update toolchain toolchain-revision bootstrap bsp bsp-grisp1 libbsd fdt bsp.mk libgrisp libinih cryptoauthlib barebox-install blas
+install: submodule-update toolchain toolchain-revision bsp libbsd fdt bsp.mk libgrisp libinih cryptoauthlib barebox-install blas
 
 .PHONY: submodule-update
 #H Update the submodules.
@@ -91,11 +91,6 @@ submodule-update:
 	git submodule update --init
 	cd $(SRC_LIBBSD) && git submodule update --init rtems_waf
 
-.PHONY: bootstrap
-#H Run bootstrap for RTEMS.
-bootstrap:
-	cd $(SRC_RTEMS) && $(RSB)/source-builder/sb-bootstrap
-
 .PHONY: toolchain
 #H Build and install the toolchain.
 toolchain:
@@ -124,46 +119,16 @@ toolchain-revision:
 .PHONY: bsp
 #H Build the RTEMS board support package.
 bsp:
-	rm -rf $(BUILD_BSP)
-	mkdir -p $(BUILD_BSP)
-	cd $(BUILD_BSP) && $(SRC_RTEMS)/configure \
-	    --target=$(ARCH)-rtems$(RTEMS_VERSION) \
-	    --prefix=$(PREFIX) \
-	    --enable-posix \
-	    --enable-rtemsbsp=$(BSP) \
-	    --enable-maintainer-mode \
-	    --disable-networking \
-	    $(EXTRA_BSP_OPTS) \
-	    IMX_CCM_IPG_HZ=66000000 \
-	    IMX_CCM_UART_HZ=80000000 \
-	    IMX_CCM_AHB_HZ=66000000 \
-	    IMX_CCM_SDHCI_HZ=198000000 \
-	    IMX_CCM_ECSPI_HZ=60000000
-	cd $(BUILD_BSP) && make -j $(NUMCORE)
-	cd $(BUILD_BSP) && make -j $(NUMCORE) install
-
-.PHONY: bsp-grisp1
-#H Build the RTEMS board support package for GRiSP1.
-bsp-grisp1:
-	rm -rf $(BUILD_BSP_GRISP1)
-	mkdir -p $(BUILD_BSP_GRISP1)
-	cd $(BUILD_BSP_GRISP1) && $(SRC_RTEMS)/configure \
-	    --target=$(ARCH)-rtems$(RTEMS_VERSION) \
-	    --prefix=$(PREFIX) \
-	    --enable-posix \
-	    --enable-rtemsbsp=$(BSP_GRISP1) \
-	    --enable-maintainer-mode \
-	    --disable-networking \
-	    --disable-tests \
-	    $(EXTRA_BSP_OPTS) \
-	    --enable-chip=same70q21 \
-	    --enable-sdram=is42s16320f-7bl \
-	    ATSAM_CONSOLE_DEVICE_TYPE=1 \
-	    ATSAM_CONSOLE_DEVICE_INDEX=2 \
-	    ATSAM_MEMORY_QSPIFLASH_SIZE=0x0 \
-	    ATSAM_MEMORY_NOCACHE_SIZE=0x8000
-	cd $(BUILD_BSP_GRISP1) && make -j $(NUMCORE)
-	cd $(BUILD_BSP_GRISP1) && make -j $(NUMCORE) install
+	cd $(SRC_RTEMS) && ./waf clean || true
+	cp src/config.ini $(SRC_RTEMS)
+	if [ "$(DEBUG)" == "1" ]; then cd $(SRC_RTEMS) && sed -i \
+		-e "s|OPTIMIZATION_FLAGS = -O2|OPTIMIZATION_FLAGS = -O0|g" \
+		-e "s|RTEMS_DEBUG = False|RTEMS_DEBUG = True|g" \
+		config.ini; \
+		fi
+	cd $(SRC_RTEMS) && ./waf configure --prefix=$(PREFIX)
+	cd $(SRC_RTEMS) && ./waf
+	cd $(SRC_RTEMS) && ./waf install
 
 .PHONY: bsp.mk
 #H Build a Makefile helper for the applications.
diff --git a/demo/Makefile b/demo/Makefile
index 299e342..4cdec88 100644
--- a/demo/Makefile
+++ b/demo/Makefile
@@ -1,5 +1,5 @@
 MAKEFILE_DIR = $(dir $(realpath $(firstword $(MAKEFILE_LIST))))
-RTEMS_ROOT ?= $(MAKEFILE_DIR)/../rtems/5
+RTEMS_ROOT ?= $(MAKEFILE_DIR)/../rtems/6
 RTEMS_BSP ?= imx7
 
 include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).mk
diff --git a/src/bsp.mk b/src/bsp.mk
index f458fcb..b685439 100644
--- a/src/bsp.mk
+++ b/src/bsp.mk
@@ -14,7 +14,7 @@ exec_prefix = $(RTEMS_ROOT)/$(RTEMS_CPU)-rtems$(RTEMS_API)
 include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
 
 DEPFLAGS = -MT $@ -MD -MP -MF $(basename $@).d
-SYSFLAGS = -B $(PROJECT_LIB) -specs bsp_specs -qrtems
+SYSFLAGS = -B $(PROJECT_LIB) -qrtems
 WARNFLAGS = -Wall -Wextra -Wconversion -Wformat-security -Wformat=2 -Wshadow -Wcast-qual -Wcast-align -Wredundant-decls
 CWARNFLAGS = $(WARNFLAGS) -Wstrict-prototypes -Wbad-function-cast
 OPTFLAGS = $(CFLAGS_OPTIMIZE_V)
diff --git a/src/config.ini b/src/config.ini
new file mode 100644
index 0000000..00f8ecb
--- /dev/null
+++ b/src/config.ini
@@ -0,0 +1,46 @@
+# Note: Only the most relevant options are listed in this file. All others fall
+# back to default values. Use the following commands in the RTEMS source tree to
+# get all default values:
+#   ./waf bsp_defaults --rtems-bsps=arm/imx7
+#   ./waf bsp_defaults --rtems-bsps=arm/atsamv
+
+[arm/imx7]
+# Enable the RTEMS internal debug support
+RTEMS_DEBUG = False
+# Enable support for POSIX signals
+RTEMS_POSIX_API = True
+# AHB clock frequency in Hz
+IMX_CCM_AHB_HZ = 66000000
+# ECSPI clock frequency in Hz
+IMX_CCM_ECSPI_HZ = 60000000
+# IPG clock frequency in Hz
+IMX_CCM_IPG_HZ = 66000000
+# SDHCI clock frequency in Hz
+IMX_CCM_SDHCI_HZ = 198000000
+# UART clock frequency in Hz
+IMX_CCM_UART_HZ = 80000000
+# Optimization flags passed to the C and C++ compiler
+OPTIMIZATION_FLAGS = -O2 -g -fdata-sections -ffunction-sections
+
+[arm/atsamv]
+# Enable the RTEMS internal debug support
+RTEMS_DEBUG = False
+# Enable support for POSIX signals
+RTEMS_POSIX_API = True
+# Build the sample programs (may be also enabled by BUILD_TESTS)
+BUILD_SAMPLES = True
+# Chip variant
+ATSAM_CHIP = same70q21
+# device index for /dev/console (default 1, e.g. USART1)
+ATSAM_CONSOLE_DEVICE_INDEX = 2
+# device type for /dev/console, use 0 for USART and 1 for UART
+# (default USART)
+ATSAM_CONSOLE_DEVICE_TYPE = 1
+# size of NOCACHE section in bytes
+ATSAM_MEMORY_NOCACHE_SIZE = 0x8000
+# size of QSPI flash in bytes
+ATSAM_MEMORY_QSPIFLASH_SIZE = 0x0
+# SDRAM variant
+ATSAM_SDRAM = is42s16320f-7bl
+# Optimization flags passed to the C and C++ compiler
+OPTIMIZATION_FLAGS = -O2 -g -fdata-sections -ffunction-sections

From 406e9c84bf995df469271a8d825487fb9b2a5b2f Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Tue, 4 Jun 2024 15:35:43 +0200
Subject: [PATCH 02/14] RSB, RTEMS, libbsd: Update to RTEMS6 based versions.

---
 external/rtems                | 2 +-
 external/rtems-libbsd         | 2 +-
 external/rtems-source-builder | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/external/rtems b/external/rtems
index 0fe6bd6..c01bd44 160000
--- a/external/rtems
+++ b/external/rtems
@@ -1 +1 @@
-Subproject commit 0fe6bd64cf9943e1fe9afa14aa4b3185cbea0735
+Subproject commit c01bd44348950d7330771b626a0141d7660c2fa2
diff --git a/external/rtems-libbsd b/external/rtems-libbsd
index 03c54a8..7f24977 160000
--- a/external/rtems-libbsd
+++ b/external/rtems-libbsd
@@ -1 +1 @@
-Subproject commit 03c54a87f18937085c06e868a2490cca2710771d
+Subproject commit 7f24977dba49bae1aa718ae77c27171bfb7d3c69
diff --git a/external/rtems-source-builder b/external/rtems-source-builder
index 43720e4..108b765 160000
--- a/external/rtems-source-builder
+++ b/external/rtems-source-builder
@@ -1 +1 @@
-Subproject commit 43720e42417b3f22e40c4017524f5ed54bf897a8
+Subproject commit 108b765c96bfa494824eae0101630aa1bbfbf435

From 7467f4dd1d38c45e9b269153ac08943c27b83719 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Mon, 11 Apr 2022 09:33:45 +0200
Subject: [PATCH 03/14] fdt: Add IGRiSP

---
 fdt/Makefile                    |   8 +-
 fdt/imx6ull-industrialgrisp.dts | 266 ++++++++++++++++++++++++++++++++
 2 files changed, 270 insertions(+), 4 deletions(-)
 create mode 100644 fdt/imx6ull-industrialgrisp.dts

diff --git a/fdt/Makefile b/fdt/Makefile
index 38df5cc..46b3d3b 100644
--- a/fdt/Makefile
+++ b/fdt/Makefile
@@ -1,7 +1,7 @@
 # Note: $(PWD) doesn't work together with -C option of make
 MAKEFILE_DIR = $(dir $(realpath $(firstword $(MAKEFILE_LIST))))
 
-BOARD = imx6ul-grisp2
+DTS = imx6ul-grisp2.dts imx6ull-industrialgrisp.dts
 SRC_FDT = $(MAKEFILE_DIR)/../external/fdt
 FDT_SYS = $(SRC_FDT)/sys
 FDT_SCRIPTS = $(FDT_SYS)/tools/fdt
@@ -11,19 +11,19 @@ BUILDDIR = $(MAKEFILE_DIR)/b-dtb
 export DTC = dtc
 export MACHINE = arm
 
-DTB = $(BUILDDIR)/$(BOARD).dtb
+DTB = $(DTS:%.dts=$(BUILDDIR)/%.dtb)
 
 all: $(DTB)
 
 install: all
 	mkdir -p $(PREFIX)/fdt
-	cp $(BOARD).dts $(PREFIX)/fdt/
+	cp $(DTS) $(PREFIX)/fdt/
 	cp $(DTB) $(PREFIX)/fdt/
 
 $(BUILDDIR):
 	mkdir $(BUILDDIR)
 
-$(DTB): $(BOARD).dts $(BUILDDIR)
+$(BUILDDIR)/%.dtb: %.dts $(BUILDDIR)
 	sh -x $(FDT_SCRIPTS)/make_dtb.sh $(FDT_SYS) $< $(BUILDDIR)
 
 clean:
diff --git a/fdt/imx6ull-industrialgrisp.dts b/fdt/imx6ull-industrialgrisp.dts
new file mode 100644
index 0000000..12356fd
--- /dev/null
+++ b/fdt/imx6ull-industrialgrisp.dts
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
+/*
+ * Copyright (C) 2020 embedded brains GmbH.
+ */
+
+/dts-v1/;
+#include "custom-imx6ul.dtsi"
+#include "imx6ul-phytec-phycore-som.dtsi"
+
+/ {
+	model = "IndustrialGRiSP";
+	compatible = "embeddedbrains,industrialgrisp", "phytec,imx6ul-pcl063-emmc", "fsl,imx6ull";
+
+	gpio_leds_grisp2: leds {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpioleds_grisp2>;
+		compatible = "gpio-leds";
+
+		igrisp-mcu-led {
+			gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
+		};
+		igrisp-rfid-led {
+			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	pmod_spi: pmod-spi {
+		pinctrl-names = "default", "gpio";
+		pinctrl-0 = <&pinctrl_spi3>;
+		pinctrl-1 = <&pinctrl_spi3_gpio>;
+		status = "okay";
+
+		/* SPI mode */
+		grisp,spi-alias = "spi2"; /* use with spi_bus_register_imx */
+		grisp,int-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+
+		/* GPIO mode */
+		grisp,gpios =
+			<&gpio1 20 GPIO_ACTIVE_HIGH>, /* X803.1 */
+			<&gpio1 22 GPIO_ACTIVE_HIGH>, /* X803.2 */
+			<&gpio1 23 GPIO_ACTIVE_HIGH>, /* X803.3 */
+			<&gpio1 21 GPIO_ACTIVE_HIGH>, /* X803.4 */
+			<&gpio1 3  GPIO_ACTIVE_HIGH>, /* X803.7 */
+			<&gpio5 0  GPIO_ACTIVE_HIGH>, /* X803.8 */
+			<&gpio1 1  GPIO_ACTIVE_HIGH>, /* X803.9 */
+			<&gpio1 18 GPIO_ACTIVE_HIGH>; /* X803.10 */
+	};
+};
+
+&fec1 {
+	status = "okay";
+	pinctrl-0 = <&pinctrl_enet1_igrisp>;
+
+	/delete-node/ mdio;
+};
+
+&fec2 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet2>;
+	phy-mode = "rmii";
+	phy-handle = <&ethphy2>;
+
+	mdio: mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy1: ethernet-phy@1 {
+			reg = <1>;
+			interrupt-parent = <&gpio1>;
+			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+			micrel,led-mode = <1>;
+			clocks = <&clks IMX6UL_CLK_ENET_REF>;
+			clock-names = "rmii-ref";
+			status = "okay";
+		};
+
+		ethphy2: ethernet-phy@2 {
+			reg = <2>;
+			interrupt-parent = <&gpio4>;
+			interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+			micrel,led-mode = <1>;
+			clocks = <&clks IMX6UL_CLK_ENET_REF>;
+			clock-names = "rmii-ref";
+			status = "okay";
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	at24mac402_eeprom: eeprom@57 {
+		compatible = "atmel,24c02";
+		reg = <0x57>;
+		status = "okay";
+	};
+	at24mac402_eui: eeprom@5f {
+		compatible = "atmel,at24mac402-eui";
+		reg = <0x5f>;
+		status = "okay";
+	};
+	atecc608: cryptoauth@36 {
+		compatible = "microchip,atecc608", "atmel,at24c16";
+		reg = <0x36>;
+		status = "okay";
+	};
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&ecspi1 {
+	status = "okay";
+	pinctrl-0 = <&pinctrl_spi1>;
+
+	cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>,
+		   <&gpio3 10 GPIO_ACTIVE_HIGH>,
+		   <&gpio3 11 GPIO_ACTIVE_HIGH>;
+
+	rfid: rfid@0 {
+		compatible = "ti,trf7970a";
+		reg = <0>;
+
+		spi-max-frequency = <2000000>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+		grisp,int-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
+		grisp,led-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+	};
+
+	dio1: dio@2 {
+		compatible = "maxim,max14906";
+		/* Really 2 for DIO1: The SS pins are numbered odd! */
+		reg = <2>;
+
+		spi-max-frequency = <2000000>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+		maxim,fault = <&gpio3 0 GPIO_ACTIVE_HIGH>;
+		maxim,ready = <&gpio3 1 GPIO_ACTIVE_HIGH>;
+	};
+
+	dio2: dio@1 {
+		compatible = "maxim,max14906";
+		/* Really 1 for DIO2: The SS pins are numbered odd! */
+		reg = <1>;
+
+		spi-max-frequency = <2000000>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+		maxim,fault = <&gpio3 2 GPIO_ACTIVE_HIGH>;
+		maxim,ready = <&gpio3 3 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&ecspi3 {
+	status = "okay";
+	pinctrl-0 = <&pinctrl_spi3>;
+
+	cs-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+
+	grisp,int-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+};
+
+&iomuxc {
+	pinctrl_spi1: spi1grp {
+		fsl,pins = <
+			MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK	0x8	/* SPI_SCK */
+			MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI	0x8	/* SPI_MOSI */
+			MX6UL_PAD_CSI_DATA07__ECSPI1_MISO	0x2000	/* SPI_MISO */
+
+			MX6UL_PAD_CSI_DATA05__GPIO4_IO26	0x8	/* SPI_SS0 */
+			MX6UL_PAD_LCD_DATA05__GPIO3_IO10	0x8	/* SPI_SS1 */
+			MX6UL_PAD_LCD_DATA06__GPIO3_IO11	0x8	/* SPI_SS2/SPI_GPIO0 */
+			MX6UL_PAD_LCD_RESET__GPIO3_IO04		0x8	/* SPI_GPIO1 */
+			MX6UL_PAD_CSI_DATA03__GPIO4_IO24	0x8	/* SPI_RESET */
+			MX6UL_PAD_CSI_VSYNC__GPIO4_IO19		0x8	/* SPI_INT */
+			MX6UL_PAD_LCD_ENABLE__GPIO3_IO01	0x8	/* SPI_READY1 */
+			MX6UL_PAD_LCD_CLK__GPIO3_IO00		0x8	/* SPI_FAULT1 */
+			MX6UL_PAD_LCD_VSYNC__GPIO3_IO03		0x8	/* SPI_READY2 */
+			MX6UL_PAD_LCD_HSYNC__GPIO3_IO02		0x8	/* SPI_FAULT2 */
+		>;
+	};
+
+	pinctrl_spi3: spi3grp {
+		fsl,pins = <
+			MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK	0x8	/* SPI3_SCK */
+			MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI	0x8	/* SPI3_MOSI */
+			MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO	0x2000	/* SPI3_MISO */
+
+			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	0x8	/* SPI3_SS0 */
+			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x8	/* SPI3_GPIO0 */
+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x8	/* SPI3_INT */
+			MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x8	/* SPI3_RESET */
+			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x8	/* SPI3_GPIO1 */
+		>;
+	};
+
+	pinctrl_spi3_gpio: spi3grp {
+		fsl,pins = <
+			MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21	0x8	/* SPI3_SCK / X803.4 */
+			MX6UL_PAD_UART2_CTS_B__GPIO1_IO22	0x8	/* SPI3_MOSI / X803.2 */
+			MX6UL_PAD_UART2_RTS_B__GPIO1_IO23	0x8	/* SPI3_MISO / X803.3 */
+			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	0x8	/* SPI3_SS0 / X803.1 */
+			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x8	/* SPI3_GPIO0 / X803.9 */
+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x8	/* SPI3_INT / X803.7 */
+			MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x8	/* SPI3_RESET / X803.8 */
+			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x8	/* SPI3_GPIO1 / X803.10 */
+		>;
+	};
+
+	pinctrl_version: versiongrp {
+		fsl,pins = <
+			MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x8	/* */
+			MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x8	/* */
+			MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05	0x8	/* */
+			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x8	/* */
+		>;
+	};
+
+	/delete-node/ pinctrl_enet1;
+
+	pinctrl_enet1_igrisp: enet1grp {
+		fsl,pins = <
+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
+			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b010
+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b010
+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b010
+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b010
+			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x17059
+		>;
+	};
+
+	pinctrl_enet2: enet2grp {
+		fsl,pins = <
+			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b010		/* ENET2_TX_D0 */
+			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b010		/* ENET2_TX_D1 */
+			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b010		/* ENET2_TX_EN */
+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b010	/* ENET2_TX_CLK */
+
+			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0		/* ENET2_RX_D0 */
+			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0		/* ENET2_RX_D1 */
+			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0		/* ENET2_RX_EN */
+			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0		/* ENET2_RX_ER */
+
+			MX6UL_PAD_NAND_DQS__GPIO4_IO16		0x8		/* ENET2_INT */
+
+			MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x10010
+			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x10010
+		>;
+	};
+
+	pinctrl_gpioleds_grisp2: gpioledsgrisp2grp {
+		fsl,pins = <
+			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x00088		/* MCU_LED */
+			MX6UL_PAD_GPIO1_IO00__GPIO1_IO00	0x00088		/* RFId_LED */
+		>;
+	};
+};

From 048b6b16aee5dab0b8e22358c74a602c6e1fed51 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Mon, 23 May 2022 10:29:53 +0200
Subject: [PATCH 04/14] libgrisp: Update for IGRiSP

---
 external/libgrisp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/external/libgrisp b/external/libgrisp
index f4efc23..5cb490e 160000
--- a/external/libgrisp
+++ b/external/libgrisp
@@ -1 +1 @@
-Subproject commit f4efc23aa3dbeb24f5c4626b618db386dab690ed
+Subproject commit 5cb490ee48bafea95a02c0314f8c854df93c5d9d

From 8ee691effea9f50e9192d7522b9a23f43cd637d8 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Fri, 13 May 2022 13:01:03 +0200
Subject: [PATCH 05/14] demo: No WiFi on IGrisp

---
 demo/init.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/demo/init.c b/demo/init.c
index c545e56..0f4c647 100644
--- a/demo/init.c
+++ b/demo/init.c
@@ -289,8 +289,11 @@ Init(rtems_task_argument arg)
 	grisp_init_dhcpcd(PRIO_DHCP);
 
 	grisp_led_set2(false, false, true);
-	sleep(3);
-	grisp_init_wpa_supplicant(wpa_supplicant_conf, PRIO_WPA, create_wlandev);
+	if (!grisp_is_industrialgrisp()) {
+		sleep(3);
+		grisp_init_wpa_supplicant(wpa_supplicant_conf, PRIO_WPA,
+		    create_wlandev);
+	}
 
 #ifdef EVENT_RECORDING
 	rtems_record_start_server(10, 1234, 10);

From 6a3e6f5cb05308798a7bfe99b271e1e3a511473a Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Mon, 11 Apr 2022 17:03:48 +0200
Subject: [PATCH 06/14] iGRiSP: Add a DIO test command

This is based on Weizhong Xu's work for PMOD DIO
---
 demo/init.c     |  40 +++-
 demo/pmod_dio.c | 487 ++++++++++++++++++++++++++++++++++++++++++++++++
 demo/pmod_dio.h |  47 +++++
 3 files changed, 565 insertions(+), 9 deletions(-)
 create mode 100644 demo/pmod_dio.c
 create mode 100644 demo/pmod_dio.h

diff --git a/demo/init.c b/demo/init.c
index 0f4c647..561c5f1 100644
--- a/demo/init.c
+++ b/demo/init.c
@@ -57,6 +57,7 @@
 #define IS_GRISP2 1
 #endif
 
+#include <grisp.h>
 #ifdef IS_GRISP1
 #include <bsp/i2c.h>
 #include <grisp/pin-config.h>
@@ -69,6 +70,7 @@
 #include "sd-card-test.h"
 #include "1wire.h"
 #include "pmod_rfid.h"
+#include "pmod_dio.h"
 
 #define STACK_SIZE_INIT_TASK	(64 * 1024)
 #define STACK_SIZE_SHELL	(64 * 1024)
@@ -79,7 +81,6 @@
 #define PRIO_WPA		(RTEMS_MAXIMUM_PRIORITY - 1)
 
 #define SPI_FDT_NAME "spi0"
-#define SPI_BUS "/dev/spibus"
 
 #define CMD_SPI_MAX_LEN 32
 
@@ -249,14 +250,30 @@ Init(rtems_task_argument arg)
 	assert(rv == 0);
 #endif
 #ifdef IS_GRISP2
-	rv = spi_bus_register_imx(SPI_BUS, SPI_FDT_NAME);
-	assert(rv == 0);
+	if (grisp_is_industrialgrisp()) {
+		/* Industrial GRiSP */
+		rv = spi_bus_register_imx(GRISP_SPI_DEVICE,
+				GRISP_INDUSTRIAL_SPI_ONBOARD_FDT_ALIAS);
+		assert(rv == 0);
+		rv = spi_bus_register_imx(GRISP_SPI_DEVICE "-pmod",
+				GRISP_INDUSTRIAL_SPI_PMOD_FDT_ALIAS);
+		assert(rv == 0);
+
+		rv = i2c_bus_register_imx(GRISP_I2C0_DEVICE,
+				GRISP_INDUSTRIAL_I2C_FDT_ALIAS);
+		assert(rv == 0);
+	} else {
+		/* GRiSP2 */
+		rv = spi_bus_register_imx(GRISP_SPI_DEVICE,
+				GRISP_SPI_FDT_ALIAS);
+		assert(rv == 0);
 
-	rv = i2c_bus_register_imx("/dev/i2c-1", "i2c0");
-	assert(rv == 0);
+		rv = i2c_bus_register_imx("/dev/i2c-1", "i2c0");
+		assert(rv == 0);
 
-	rv = i2c_bus_register_imx("/dev/i2c-2", "i2c1");
-	assert(rv == 0);
+		rv = i2c_bus_register_imx("/dev/i2c-2", "i2c1");
+		assert(rv == 0);
+	}
 #endif /* IS_GRISP2 */
 
 	printf("Init EEPROM\n");
@@ -302,8 +319,13 @@ Init(rtems_task_argument arg)
 
 	init_led();
 #ifdef IS_GRISP2
-	// uncomment for testing RFID
-	//pmod_rfid_init(SPI_BUS, 1);
+	if (grisp_is_industrialgrisp()) {
+		pmod_rfid_init(GRISP_SPI_DEVICE, 0);
+		pmod_dio_init(GRISP_SPI_DEVICE);
+	} else {
+		// uncomment for testing RFID
+		//pmod_rfid_init(GRISP_SPI_DEVICE, 1);
+	}
 #endif /* IS_GRISP2 */
 	start_shell();
 
diff --git a/demo/pmod_dio.c b/demo/pmod_dio.c
new file mode 100644
index 0000000..0f3d474
--- /dev/null
+++ b/demo/pmod_dio.c
@@ -0,0 +1,487 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rtems.h>
+#include <rtems/shell.h>
+
+#include <grisp.h>
+
+#ifdef GRISP_PLATFORM_GRISP2
+#include <bsp/fdt.h>
+#include <bsp/imx-gpio.h>
+
+#include <assert.h>
+#include <dev/spi/spi.h>
+#include <err.h>
+#include <fcntl.h>
+#include <libfdt.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/stat.h>
+
+#include "pmod_rfid.h"
+
+#define MAX14906_SetOUT			0x00
+#define MAX14906_SetLED			0x01
+#define MAX14906_DoiLevel		0x02
+#define MAX14906_Interrupt		0x03
+#define MAX14906_OvrLdChF		0x04
+#define MAX14906_OpnWirChF		0x05
+#define MAX14906_ShtVDDChF		0x06
+#define MAX14906_GlobalErr		0x07
+#define MAX14906_OpnWrEn		0x08
+#define MAX14906_ShtVDDEn		0x09
+#define MAX14906_Config1		0x0A
+#define MAX14906_Config2		0x0B
+#define MAX14906_ConfigDI		0x0C
+#define MAX14906_ConfigDO		0x0D
+#define MAX14906_CurrLim		0x0E
+#define MAX14906_Mask			0x0F
+
+#define MAX14906_REGISTERS		0x10
+
+#define MAX_CASCADED_BOARDS		4
+
+#define	CLEAR_BIT(x, bit)		(x &= (uint8_t)~(1u << (bit)))
+#define	SET_BIT(x, bit)			(x |= (uint8_t)(1u << (bit)))
+
+struct pmod_dio_ctx {
+	rtems_shell_cmd_t shell_cmd;
+	int bus;
+	uint8_t cs;
+	struct imx_gpio_pin fault;
+	struct imx_gpio_pin ready;
+	bool initialized;
+	uint8_t regs[MAX_CASCADED_BOARDS][MAX14906_REGISTERS];
+};
+
+static uint8_t
+max14906_build_addr(int board, uint8_t addr, uint8_t write)
+{
+	return (uint8_t)((board << 6) + (addr << 1) + write);
+}
+
+/*
+ * Calculate the CRC from first_bit to last_bit. According to AN 6633, the
+ * checksum from CPU to MAX14915 is calculated from bit 0 to bit 18 and the
+ * checksum from MAX14915 to CPU is calculated from bit 2 to bit 18.
+ */
+static uint8_t
+max14906_crc5encode(uint8_t *buf, size_t first_bit, size_t last_bit)
+{
+	uint8_t crc5_start = 0x1f;
+	uint8_t crc5_poly = 0x15;
+	uint8_t crc_result = crc5_start;
+	size_t i;
+
+	for (i = first_bit; i <= last_bit; ++i) {
+		uint8_t bit = (buf[i/8] >> (7-(i%8))) & 0x01;
+		uint8_t crc_result_bit4 = (crc_result >> 4) & 0x01;
+
+		if (bit ^ crc_result_bit4) {
+			crc_result =
+				(uint8_t)(crc5_poly ^ ((crc_result<<1) & 0x1f));
+		} else {
+			crc_result = (uint8_t)((crc_result<<1) & 0x1f);
+		}
+	}
+
+	return crc_result;
+}
+
+/*
+ * Return returned second byte on success or -1 on error.
+ */
+static int
+pmod_dio_register_rw(
+	struct pmod_dio_ctx *ctx,
+	int board,
+	uint8_t addr,
+	uint8_t write,
+	uint8_t value
+)
+{
+	uint8_t tx_buf[] = {
+		max14906_build_addr(board, addr, write),
+		value,
+		0
+	};
+	uint8_t rx_buf[sizeof(tx_buf)];
+	spi_ioc_transfer msg = {
+		.len = sizeof(tx_buf),
+		.rx_buf = rx_buf,
+		.tx_buf = tx_buf,
+		.speed_hz = 200000,
+		.bits_per_word = 8,
+		.mode = SPI_MODE_0,
+		.cs = ctx->cs,
+		.cs_change = true,
+	};
+	int error;
+	uint8_t crc;
+
+	tx_buf[sizeof(tx_buf)-1] = max14906_crc5encode(tx_buf, 0,
+			sizeof(tx_buf) * 8 - 6);
+
+	error = ioctl(ctx->bus, SPI_IOC_MESSAGE(1), &msg);
+	if (error != 0) {
+		return -1;
+	}
+	crc = max14906_crc5encode(rx_buf, 2, sizeof(rx_buf) * 8 - 6);
+	if (crc != (rx_buf[sizeof(rx_buf)-1] & 0x1F)) {
+		return -1;
+	}
+	return rx_buf[1];
+}
+
+static int
+pmod_dio_register_write(
+	struct pmod_dio_ctx *ctx,
+	int board,
+	uint8_t addr
+)
+{
+	return pmod_dio_register_rw(ctx, board, addr, 1,
+	    ctx->regs[board][addr]);
+}
+
+static int
+pmod_dio_register_read(
+	struct pmod_dio_ctx *ctx,
+	int board,
+	uint8_t addr
+)
+{
+	return pmod_dio_register_rw(ctx, board, addr, 0, 0);
+}
+
+static int
+pmod_dio_set_op_mode_func(
+	struct pmod_dio_ctx *ctx,
+	int board,
+	int chan,
+	int op_mode
+)
+{
+	int rv;
+
+	if (chan < 0 || chan > 3 || op_mode < 0 || op_mode > 6) {
+		printf("Usage:\n%s", ctx->shell_cmd.usage);
+		return -1;
+	};
+
+	 if (op_mode < 4) {
+		CLEAR_BIT(ctx->regs[board][MAX14906_SetOUT], chan+4);
+
+		if (op_mode == 0) { /* High-side */
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2);
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2+1);
+		} else if (op_mode == 1) { /* High-side with 2x inrush current */
+			SET_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2);
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2+1);
+		} else if (op_mode == 2) { /* Active-clamp push-pull */
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2);
+			SET_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2+1);
+		} else { /* Simple push-pull */
+			SET_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2);
+			SET_BIT(ctx->regs[board][MAX14906_ConfigDO], chan*2+1);
+		}
+
+		rv = pmod_dio_register_write(ctx, board, MAX14906_SetOUT);
+		assert(rv >= 0);
+		rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(500));
+
+		rv = pmod_dio_register_write(ctx, board, MAX14906_ConfigDO);
+		assert(rv >= 0);
+		rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(500));
+	} else {
+		SET_BIT(ctx->regs[board][MAX14906_SetOUT], chan+4);
+
+		if (op_mode == 4) { /* Low-leakage, High-impedance */
+			SET_BIT(ctx->regs[board][MAX14906_ConfigDO], (chan*2+1));
+		} else if (op_mode == 5) { /* DI Mode, Type 1 and 3 */
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDI], 7);
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDO], (chan*2+1));
+		} else if (op_mode == 6) { /* DI Mode, Type 2 */
+			SET_BIT(ctx->regs[board][MAX14906_ConfigDI], 7);
+			CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDO], (chan*2+1));
+		}
+
+		rv = pmod_dio_register_write(ctx, board, MAX14906_SetOUT);
+		assert(rv >= 0);
+		rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(500));
+
+		rv = pmod_dio_register_write(ctx, board, MAX14906_ConfigDO);
+		assert(rv >= 0);
+		rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(500));
+
+		rv = pmod_dio_register_write(ctx, board, MAX14906_ConfigDI);
+		assert(rv >= 0);
+		rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(500));
+	}
+
+	return 0;
+}
+
+static int
+pmod_dio_read_input_func(struct pmod_dio_ctx *ctx, int board, int chan)
+{
+	int rv;
+
+	if (chan < 0 || chan > 3) {
+		printf("Usage:\n%s", ctx->shell_cmd.usage);
+		return -1;
+	};
+
+	/* VDDFaultSe = 0 */
+	CLEAR_BIT(ctx->regs[board][MAX14906_ConfigDI], 4);
+	rv = pmod_dio_register_write(ctx, board, MAX14906_ConfigDI);
+	assert(rv >= 0);
+	rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(500));
+
+	/* Read input */
+	rv = pmod_dio_register_read(ctx, board, MAX14906_DoiLevel);
+	assert(rv >= 0);
+	ctx->regs[board][MAX14906_DoiLevel] = (uint8_t) rv;
+
+	if ((rv & (1 << chan)) != 0) {
+		printf("input is high\n");
+	} else {
+		printf("input is low\n");
+	}
+
+	return 0;
+}
+
+static int
+pmod_dio_write_output_func(
+	struct pmod_dio_ctx *ctx,
+	int board,
+	int chan,
+	int lvl
+)
+{
+	int rv;
+
+	/* FIXME: Better error handling instead of asserts */
+
+	if (chan < 0 || chan > 3 || lvl < 0 || lvl > 1) {
+		printf("Usage:\n%s", ctx->shell_cmd.usage);
+		return -1;
+	};
+
+	if (lvl == 0) {
+		CLEAR_BIT(ctx->regs[board][MAX14906_SetOUT], chan);
+	} else {
+		SET_BIT(ctx->regs[board][MAX14906_SetOUT], chan);
+	}
+
+	rv = pmod_dio_register_write(ctx, board, MAX14906_SetOUT);
+	assert(rv >= 0);
+
+	return 0;
+}
+
+static int
+pmod_dio_init_board_func(struct pmod_dio_ctx *ctx, int board)
+{
+	size_t i;
+	int rv;
+
+	/* FIXME: Better error handling instead of asserts */
+
+	/* copy all registers */
+	for (i = 0; i < MAX14906_REGISTERS; ++i) {
+		rv = pmod_dio_register_read(ctx, board, (uint8_t)i);
+		assert(rv >= 0);
+		ctx->regs[board][i] = (uint8_t)rv;
+		rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(100));
+	}
+
+	/* Set LEDs which are controlled directly by the MAX14906 */
+	CLEAR_BIT(ctx->regs[board][MAX14906_Config1], 0);
+	CLEAR_BIT(ctx->regs[board][MAX14906_Config1], 1);
+	rv = pmod_dio_register_write(ctx, board, MAX14906_Config1);
+	assert(rv >= 0);
+	rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(100));
+
+	/* Enable gate driver */
+	SET_BIT(ctx->regs[board][MAX14906_OpnWrEn], 4);
+	SET_BIT(ctx->regs[board][MAX14906_OpnWrEn], 5);
+	SET_BIT(ctx->regs[board][MAX14906_OpnWrEn], 6);
+	SET_BIT(ctx->regs[board][MAX14906_OpnWrEn], 7);
+	rv = pmod_dio_register_write(ctx, board, MAX14906_OpnWrEn);
+	assert(rv >= 0);
+	rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(100));
+
+	/* current limit up to 1.2 A */
+	ctx->regs[board][MAX14906_CurrLim] = 0xff;
+	rv = pmod_dio_register_write(ctx, board, MAX14906_CurrLim);
+	assert(rv >= 0);
+	rtems_task_wake_after(RTEMS_MILLISECONDS_TO_TICKS(100));
+
+	return 0;
+}
+
+static struct pmod_dio_ctx *
+pmod_dio_get_ctx_from_shell(char **argv)
+{
+	rtems_shell_cmd_t *shell_cmd;
+
+	shell_cmd = rtems_shell_lookup_cmd(argv[0]);
+	return RTEMS_CONTAINER_OF(shell_cmd, struct pmod_dio_ctx, shell_cmd);
+}
+
+static int
+pmod_dio_func(int argc, char **argv)
+{
+	struct pmod_dio_ctx *ctx = pmod_dio_get_ctx_from_shell(argv);
+	int board = 0; /* Number of the cascaded board */
+	int second = -1; /* Second numeric argument */
+	int third = -1; /* Third numeric argument */
+
+	if (argc < 2) {
+		printf("Usage:\n%s", ctx->shell_cmd.usage);
+		return -1;
+	}
+
+	if (argc >= 3) {
+		errno = 0;
+		board = (uint8_t)strtol(argv[2], NULL, 0);
+		if (errno != 0 || board < 0 || board >= MAX_CASCADED_BOARDS) {
+			printf("Usage:\n%s", ctx->shell_cmd.usage);
+			return -1;
+		}
+	}
+
+	if (argc >= 4) {
+		errno = 0;
+		second = (uint8_t)strtol(argv[3], NULL, 0);
+		if (errno != 0) {
+			printf("Usage:\n%s", ctx->shell_cmd.usage);
+			return -1;
+		}
+	}
+
+	if (argc >= 5) {
+		errno = 0;
+		third = (uint8_t)strtol(argv[4], NULL, 0);
+		if (errno != 0) {
+			printf("Usage:\n%s", ctx->shell_cmd.usage);
+			return -1;
+		}
+	}
+
+	if (strcmp(argv[1], "set_op_mode") == 0) {
+		return pmod_dio_set_op_mode_func(ctx, board, second, third);
+	} else if (strcmp(argv[1], "init_board") == 0) {
+		return pmod_dio_init_board_func(ctx, board);
+	} else if (strcmp(argv[1], "read_input") == 0) {
+		return pmod_dio_read_input_func(ctx, board, second);
+	} else if (strcmp(argv[1], "write_output") == 0) {
+		return pmod_dio_write_output_func(ctx, board, second, third);
+	} else {
+		printf("Usage:\n%s", ctx->shell_cmd.usage);
+		return -1;
+	}
+}
+
+static void
+pmod_dio_do_init(const void *fdt, int node, const char *spi_bus)
+{
+	struct pmod_dio_ctx *ctx;
+	const void *prop;
+	const char *name;
+	static const char topic[] = "dio";
+	static const char usage[] = "Call with:\n"
+		"  dioX init_board <board>\n"
+		"  dioX set_op_mode <board> <chan> <op-mode>\n"
+		"  dioX read_input <board> <chan>\n"
+		"  dioX write_output <board> <chan> <lvl>\n"
+		"where:\n"
+		"  <board>   Number of the cascaded board. [0..3]\n"
+		"  <chan>    Channel to read / write. [0..3]\n"
+		"  <lvl>     Level to set. [0..1]\n"
+		"  <op-mode> operational mode:\n"
+		"            0: High-side\n"
+		"            1: High-side with 2x inrush current\n"
+		"            2: Active-clamp push-pull\n"
+		"            3: Simple push-pull\n"
+		"            4: Low-leakage, High-impedance\n"
+		"            5: DI Mode, Type 1 and 3\n"
+		"            6: DI Mode, Type 2\n";
+	rtems_status_code sc;
+	rtems_shell_cmd_t *cmd;
+
+	/* FIXME: Should use better error handling than asserts! But it's only a
+	 * test so let's use them for now. */
+
+	name = fdt_get_name(fdt, node, NULL);
+	assert(name != NULL);
+
+	ctx = calloc(sizeof(*ctx), 1);
+	assert(ctx != NULL);
+
+	ctx->shell_cmd.name = name;
+	ctx->shell_cmd.usage = usage;
+	ctx->shell_cmd.topic = topic;
+	ctx->shell_cmd.command = pmod_dio_func;
+
+	ctx->bus = open(spi_bus, O_RDWR);
+	assert(ctx->bus >= 0);
+
+	prop = fdt_getprop(fdt, node, "reg", NULL);
+	assert(prop != NULL);
+	ctx->cs = (uint8_t) fdt32_ld(prop);
+
+	sc = imx_gpio_init_from_fdt_property(
+	    &ctx->fault, node, "maxim,fault", IMX_GPIO_MODE_INPUT, 0);
+	assert(sc == RTEMS_SUCCESSFUL);
+	sc = imx_gpio_init_from_fdt_property(
+	    &ctx->ready, node, "maxim,ready", IMX_GPIO_MODE_INPUT, 0);
+	assert(sc == RTEMS_SUCCESSFUL);
+
+	cmd = rtems_shell_add_cmd_struct(&ctx->shell_cmd);
+	assert(cmd != NULL);
+}
+
+void
+pmod_dio_init(const char *spi_bus)
+{
+	const void *fdt = bsp_fdt_get();
+	int node = -1;
+
+	do {
+		node = fdt_node_offset_by_compatible(fdt, node,
+				"maxim,max14906");
+
+		if (node >= 0) {
+			pmod_dio_do_init(fdt, node, spi_bus);
+		}
+	} while (node >= 0);
+}
+#endif /* IS_GRISP2 */
diff --git a/demo/pmod_dio.h b/demo/pmod_dio.h
new file mode 100644
index 0000000..afaa10c
--- /dev/null
+++ b/demo/pmod_dio.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef DEMO_PMOD_DIO_H
+#define DEMO_PMOD_DIO_H
+
+#include <rtems.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/*
+ * Initialize necessary stuff and add shell commands to work with PMOD_DIO.
+ * Note: This function will get most of the necessary information from FDT.
+ */
+void pmod_dio_init(const char *spi_bus);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* DEMO_PMOD_RFID_H */

From 2fd9af9147768577c0a6e8e251f4d765964770d5 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Fri, 13 May 2022 14:31:48 +0200
Subject: [PATCH 07/14] demo: Add PMOD RFID to IGRiSP

---
 demo/pmod_rfid.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/demo/pmod_rfid.c b/demo/pmod_rfid.c
index 1468ba8..152a491 100644
--- a/demo/pmod_rfid.c
+++ b/demo/pmod_rfid.c
@@ -620,19 +620,21 @@ pmod_rfid_init_pins(struct pmod_rfid_ctx *ctx)
 {
 	rtems_status_code sc;
 	int node;
-	const char *path;
 	const void *fdt;
 
 	fdt = bsp_fdt_get();
-	path = fdt_get_alias(fdt, "spi0");
-	if (path == 0) {
+
+	node = fdt_node_offset_by_compatible(fdt, -1, "ti,trf7970a");
+	if (node < 0) {
 		return RTEMS_UNSATISFIED;
 	}
-	node = fdt_path_offset(fdt, path);
 
-	/* LED is connected to SS3 */
+	/* LED */
 	sc = imx_gpio_init_from_fdt_property(&ctx->led,
-	    node, "cs-gpios", IMX_GPIO_MODE_OUTPUT, 3);
+	    node, "grisp,led-gpios", IMX_GPIO_MODE_OUTPUT, 0);
+	if (sc != RTEMS_SUCCESSFUL) {
+		return sc;
+	}
 
 	/* Interrupt pin */
 	/* FIXME: The interrupt pin isn't used yet. Initialization is done so it

From 4daf05b1cb25dfac9a2f6b842fb9bcbf0c0c6c1f Mon Sep 17 00:00:00 2001
From: Weizhong Xu <weizhong.xu@embedded-brains.de>
Date: Tue, 17 May 2022 10:46:54 +0200
Subject: [PATCH 08/14] demo: Fix chip select for RFID

---
 demo/pmod_rfid.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/demo/pmod_rfid.c b/demo/pmod_rfid.c
index 152a491..c64da27 100644
--- a/demo/pmod_rfid.c
+++ b/demo/pmod_rfid.c
@@ -228,6 +228,7 @@ pmod_rfid_transfer(
 		.bits_per_word = 8,
 		.mode = SPI_MODE_1,
 		.cs = ctx->cs,
+		.cs_change = true,
 	};
 
 	verb_print(ctx, VERBOSE_ALL, "Tx: ");

From 705b4f978fb377eafa6ab534022d1a0520a608ce Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Thu, 20 Jul 2023 11:29:37 +0200
Subject: [PATCH 09/14] Add RTC driver for GRiSP Charger

---
 demo/init.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/demo/init.c b/demo/init.c
index 561c5f1..9211321 100644
--- a/demo/init.c
+++ b/demo/init.c
@@ -30,6 +30,7 @@
  */
 
 #undef EVENT_RECORDING
+#define RTC_ENABLED
 
 #include <assert.h>
 #include <stdlib.h>
@@ -45,6 +46,10 @@
 #include <rtems/stringto.h>
 #include <rtems/ftpd.h>
 #include <machine/rtems-bsd-commands.h>
+#ifdef RTC_ENABLED
+#include <libchip/rtc.h>
+#include <libchip/mcp7940m-rtc.h>
+#endif
 #ifdef EVENT_RECORDING
 #include <rtems/record.h>
 #include <rtems/recordserver.h>
@@ -276,6 +281,10 @@ Init(rtems_task_argument arg)
 	}
 #endif /* IS_GRISP2 */
 
+#ifdef RTC_ENABLED
+	setRealTimeToRTEMS();
+#endif
+
 	printf("Init EEPROM\n");
 	grisp_eeprom_init();
 	rv = grisp_eeprom_get(&eeprom);
@@ -332,6 +341,17 @@ Init(rtems_task_argument arg)
 	exit(0);
 }
 
+#ifdef RTC_ENABLED
+static struct mcp7940m_rtc rtc_ctx =
+	MCP7940M_RTC_INITIALIZER("/dev/i2c-1", 0x6f, false);
+
+rtc_tbl RTC_Table[] = {
+	MCP7940M_RTC_TBL_ENTRY("/dev/rtc", &rtc_ctx),
+};
+
+size_t RTC_Count = (sizeof(RTC_Table)/sizeof(rtc_tbl));
+#endif
+
 /*
  * Configure LibBSD.
  */
@@ -346,6 +366,9 @@ Init(rtems_task_argument arg)
  */
 #define CONFIGURE_MICROSECONDS_PER_TICK 10000
 
+#ifdef RTC_ENABLED
+#define CONFIGURE_APPLICATION_NEEDS_RTC_DRIVER
+#endif
 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
 #define CONFIGURE_APPLICATION_NEEDS_STUB_DRIVER

From 6f35d03b903a1730b3bc0ed6a0c5644c28226c24 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Wed, 5 Jun 2024 07:39:55 +0200
Subject: [PATCH 10/14] Fix submodule of LibBSD.

---
 external/rtems-libbsd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/external/rtems-libbsd b/external/rtems-libbsd
index 7f24977..297a819 160000
--- a/external/rtems-libbsd
+++ b/external/rtems-libbsd
@@ -1 +1 @@
-Subproject commit 7f24977dba49bae1aa718ae77c27171bfb7d3c69
+Subproject commit 297a819647219976f376109e5fcdf2618e161302

From 6a695c187cda6bcc2fb7cf91dd83ee3377d507b2 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Wed, 5 Jun 2024 08:30:15 +0200
Subject: [PATCH 11/14] RSB: Download first and retry downloads a few times

---
 Makefile | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 1f312e0..ce504c4 100644
--- a/Makefile
+++ b/Makefile
@@ -96,10 +96,25 @@ submodule-update:
 toolchain:
 	mkdir -p $(BUILD_LOGS)
 	rm -rf $(RSB)/rtems/build
+	# Downloading sometimes fails on the first try. So start with
+	# downloading twice
 	cd $(RSB)/rtems && ../source-builder/sb-set-builder \
+	    --source-only-download \
 	    --prefix=$(PREFIX) \
 	    --log=$(BUILD_LOGS)/rsb-toolchain.log \
-		--with-fortran \
+	    --with-fortran \
+	    $(RTEMS_VERSION)/rtems-$(ARCH) || true
+	cd $(RSB)/rtems && ../source-builder/sb-set-builder \
+	    --source-only-download \
+	    --prefix=$(PREFIX) \
+	    --log=$(BUILD_LOGS)/rsb-toolchain.log \
+	    --with-fortran \
+	    $(RTEMS_VERSION)/rtems-$(ARCH)
+	# Now build the tools
+	cd $(RSB)/rtems && ../source-builder/sb-set-builder \
+	    --prefix=$(PREFIX) \
+	    --log=$(BUILD_LOGS)/rsb-toolchain.log \
+	    --with-fortran \
 	    $(RTEMS_VERSION)/rtems-$(ARCH)
 	rm -rf $(RSB)/rtems/build
 

From 20bf9b244e3da105b54cf7d40b0fd405dd49ecf7 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Wed, 5 Jun 2024 09:07:37 +0200
Subject: [PATCH 12/14] GDB now needs gmp and mpfr

---
 .github/workflows/ci.yml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 22c941a..8d3a56f 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -31,6 +31,8 @@ jobs:
               device-tree-compiler \
               u-boot-tools \
               lzop \
+              libgmp3-dev \
+              libmpfr-dev \
               libusb-1.0-0-dev \
               python3 \
               python-is-python3 \

From d2952477df2c6d96b73b3862602da8d14b74bf22 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Fri, 7 Jun 2024 11:08:31 +0200
Subject: [PATCH 13/14] RSB: Update to version that uses gitlab links

---
 external/rtems-source-builder | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/external/rtems-source-builder b/external/rtems-source-builder
index 108b765..f39e958 160000
--- a/external/rtems-source-builder
+++ b/external/rtems-source-builder
@@ -1 +1 @@
-Subproject commit 108b765c96bfa494824eae0101630aa1bbfbf435
+Subproject commit f39e9584775a0bccdbd6959a9c55d473330d08e2

From 97e74dbb93d71dd06269d3dad6115bc946b6238f Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Fri, 7 Jun 2024 11:29:33 +0200
Subject: [PATCH 14/14] CI: Work arround issue with rate limited server for gmp

---
 .github/workflows/ci.yml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 8d3a56f..c56e51f 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -48,6 +48,13 @@ jobs:
       - name: Build toolchain
         shell: bash
         run: |
+          # Hack: Downloading gmp often fails on github. Seems that the server
+          # is rate limited or something like that. So pre-fetch the file from a
+          # mirror.
+          make submodule-update
+          mkdir external/rtems-source-builder/rtems/sources
+          wget -O external/rtems-source-builder/rtems/sources/gmp-6.3.0.tar.bz2 https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.bz2
+          # Hack end
           make install
           if [ "$RUNNER_OS" == "Linux" ]; then
             make barebox