@@ -262,10 +262,9 @@ void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
262262 true ); // Increment dest address
263263 readChannel.setTrigger (getDMAC_ID_RX ());
264264 readChannel.setAction (DMA_TRIGGER_ACTON_BEAT);
265- // Since all RX transfers involve a TX,
266- // I don't think this separate callback is necessary.
267- // readChannel.setCallback(dmaCallback);
268265 spiPtr[readChannel.getChannel ()] = this ;
266+ // Since all RX transfers involve a TX, a
267+ // separate callback here is not necessary.
269268 }
270269 }
271270
@@ -281,8 +280,8 @@ void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
281280 (void *)getDataRegister (), // Dest (SPI data register)
282281 0 , // Count (set later)
283282 DMA_BEAT_SIZE_BYTE, // Bytes/hwords/words
284- false , // Don't increment source address
285- true ); // Increment dest address
283+ true , // Increment source address
284+ false ); // Don't increment dest address
286285 writeChannel.setTrigger (getDMAC_ID_TX ());
287286 writeChannel.setAction (DMA_TRIGGER_ACTON_BEAT);
288287 writeChannel.setCallback (dmaCallback);
@@ -293,8 +292,8 @@ void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
293292 if (writeDescriptor && (readDescriptor || !rxbuf)) {
294293 static const uint8_t dum = 0xFF ; // Dummy byte for read-only xfers
295294
296- // Initialize read descriptor dest address to rxbuf (even if NULL)
297- if (readDescriptor ) readDescriptor->DSTADDR .reg = (uint32_t )rxbuf;
295+ // Initialize read descriptor dest address to rxbuf
296+ if (rxbuf ) readDescriptor->DSTADDR .reg = (uint32_t )rxbuf;
298297
299298 // If reading only, set up writeDescriptor to issue dummy bytes
300299 // (set SRCADDR to &dum and SRCINC to 0). Otherwise, set SRCADDR
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