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deanm1278deanm1278
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Merge pull request arduino#66 from adafruit/dm-pwm
pwm fixes
2 parents 902d525 + f122ab9 commit 4d76c57

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8 files changed

+440
-392
lines changed

8 files changed

+440
-392
lines changed

‎cores/arduino/WVariant.h‎

Lines changed: 101 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,8 @@ typedef enum _EAnalogChannel
6161

6262
#if defined(__SAMD51__)
6363

64+
#if defined(__SAMD51G19A__)
65+
6466
typedef enum _ETCChannel
6567
{
6668
NOT_ON_TIMER=-1,
@@ -70,17 +72,66 @@ typedef enum _ETCChannel
7072
TCC0_CH3 = (0<<8)|(3),
7173
TCC0_CH4 = (0<<8)|(4),
7274
TCC0_CH5 = (0<<8)|(5),
73-
TCC0_CH6 = (0<<8)|(6),
74-
TCC0_CH7 = (0<<8)|(7),
7575
TCC1_CH0 = (1<<8)|(0),
7676
TCC1_CH1 = (1<<8)|(1),
7777
TCC1_CH2 = (1<<8)|(2),
7878
TCC1_CH3 = (1<<8)|(3),
79-
TCC1_CH4 = (1<<8)|(0),
80-
TCC1_CH5 = (1<<8)|(1),
81-
TCC1_CH6 = (1<<8)|(2),
82-
TCC1_CH7 = (1<<8)|(3),
79+
TCC2_CH0 = (2<<8)|(0),
80+
TCC2_CH1 = (2<<8)|(1),
81+
TCC2_CH2 = (2<<8)|(2),
82+
TC0_CH0 = (3<<8)|(0),
83+
TC0_CH1 = (3<<8)|(1),
84+
TC1_CH0 = (4<<8)|(0),
85+
TC1_CH1 = (4<<8)|(1),
86+
TC2_CH0 = (5<<8)|(0),
87+
TC2_CH1 = (5<<8)|(1),
88+
TC3_CH0 = (6<<8)|(0),
89+
TC3_CH1 = (6<<8)|(1),
8390
} ETCChannel ;
91+
#elif defined(__SAMD51J19A__) || defined(__SAMD51J20A__)
92+
93+
typedef enum _ETCChannel
94+
{
95+
NOT_ON_TIMER=-1,
96+
TCC0_CH0 = (0<<8)|(0),
97+
TCC0_CH1 = (0<<8)|(1),
98+
TCC0_CH2 = (0<<8)|(2),
99+
TCC0_CH3 = (0<<8)|(3),
100+
TCC0_CH4 = (0<<8)|(4),
101+
TCC0_CH5 = (0<<8)|(5),
102+
TCC1_CH0 = (1<<8)|(0),
103+
TCC1_CH1 = (1<<8)|(1),
104+
TCC1_CH2 = (1<<8)|(2),
105+
TCC1_CH3 = (1<<8)|(3),
106+
TCC2_CH0 = (2<<8)|(0),
107+
TCC2_CH1 = (2<<8)|(1),
108+
TCC2_CH2 = (2<<8)|(2),
109+
TCC3_CH0 = (3<<8)|(0),
110+
TCC3_CH1 = (3<<8)|(1),
111+
TCC4_CH0 = (4<<8)|(0),
112+
TCC4_CH1 = (4<<8)|(1),
113+
TC0_CH0 = (5<<8)|(0),
114+
TC0_CH1 = (5<<8)|(1),
115+
TC1_CH0 = (6<<8)|(0),
116+
TC1_CH1 = (6<<8)|(1),
117+
TC2_CH0 = (7<<8)|(0),
118+
TC2_CH1 = (7<<8)|(1),
119+
TC3_CH0 = (8<<8)|(0),
120+
TC3_CH1 = (8<<8)|(1),
121+
TC4_CH0 = (9<<8)|(0),
122+
TC4_CH1 = (9<<8)|(1),
123+
TC5_CH0 = (10<<8)|(0),
124+
TC5_CH1 = (10<<8)|(1),
125+
} ETCChannel ;
126+
127+
#elif defined(__SAMD51P19A__) || defined(__SAMD51P20A__)
128+
129+
#endif
130+
131+
typedef ETCChannel EPWMChannel;
132+
extern const uint32_t GCLK_CLKCTRL_IDs[TCC_INST_NUM+TC_INST_NUM];
133+
134+
#define NOT_ON_PWM NOT_ON_TIMER
84135

85136
#else
86137
// Definitions for TC channels
@@ -110,6 +161,41 @@ typedef enum _ETCChannel
110161
TC5_CH0 = (5<<8)|(0),
111162
TC5_CH1 = (5<<8)|(1),
112163
} ETCChannel ;
164+
165+
// Definitions for PWM channels
166+
typedef enum _EPWMChannel
167+
{
168+
NOT_ON_PWM=-1,
169+
PWM0_CH0=TCC0_CH0,
170+
PWM0_CH1=TCC0_CH1,
171+
PWM0_CH2=TCC0_CH2,
172+
PWM0_CH3=TCC0_CH3,
173+
PWM0_CH4=TCC0_CH4,
174+
PWM0_CH5=TCC0_CH5,
175+
PWM0_CH6=TCC0_CH6,
176+
PWM0_CH7=TCC0_CH7,
177+
PWM1_CH0=TCC1_CH0,
178+
PWM1_CH1=TCC1_CH1,
179+
PWM1_CH2=TCC1_CH2,
180+
PWM1_CH3=TCC1_CH3,
181+
PWM2_CH0=TCC2_CH0,
182+
PWM2_CH1=TCC2_CH1,
183+
PWM2_CH2=TCC2_CH2,
184+
PWM2_CH3=TCC2_CH3,
185+
PWM3_CH0=TC3_CH0,
186+
PWM3_CH1=TC3_CH1,
187+
PWM4_CH0=TC4_CH0,
188+
PWM4_CH1=TC4_CH1,
189+
PWM5_CH0=TC5_CH0,
190+
PWM5_CH1=TC5_CH1,
191+
#if defined(__SAMD21J18A__)
192+
PWM6_CH0=TC6_CH0,
193+
PWM6_CH1=TC6_CH1,
194+
PWM7_CH0=TC7_CH0,
195+
PWM7_CH1=TC7_CH1,
196+
#endif // __SAMD21J18A__
197+
} EPWMChannel ;
198+
113199
#endif
114200

115201
extern const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM] ;
@@ -118,68 +204,6 @@ extern const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM] ;
118204
#define GetTCChannelNumber( x ) ( (x) & 0xff )
119205
#define GetTC( x ) ( g_apTCInstances[(x) >> 8] )
120206

121-
122-
#if defined(__SAMD51__)
123-
124-
typedef enum _EPWMChannel
125-
{
126-
NOT_ON_PWM=-1,
127-
PWM0_CH0=TCC0_CH0,
128-
PWM0_CH1=TCC0_CH1,
129-
PWM0_CH2=TCC0_CH2,
130-
PWM0_CH3=TCC0_CH3,
131-
PWM0_CH4=TCC0_CH4,
132-
PWM0_CH5=TCC0_CH5,
133-
PWM0_CH6=TCC0_CH6,
134-
PWM0_CH7=TCC0_CH7,
135-
PWM1_CH0=TCC1_CH0,
136-
PWM1_CH1=TCC1_CH1,
137-
PWM1_CH2=TCC1_CH2,
138-
PWM1_CH3=TCC1_CH3,
139-
PWM1_CH4=TCC1_CH4,
140-
PWM1_CH5=TCC1_CH5,
141-
PWM1_CH6=TCC1_CH6,
142-
PWM1_CH7=TCC1_CH7,
143-
} EPWMChannel ;
144-
145-
#else //end __SAMD51J19A__
146-
// Definitions for PWM channels
147-
typedef enum _EPWMChannel
148-
{
149-
NOT_ON_PWM=-1,
150-
PWM0_CH0=TCC0_CH0,
151-
PWM0_CH1=TCC0_CH1,
152-
PWM0_CH2=TCC0_CH2,
153-
PWM0_CH3=TCC0_CH3,
154-
PWM0_CH4=TCC0_CH4,
155-
PWM0_CH5=TCC0_CH5,
156-
PWM0_CH6=TCC0_CH6,
157-
PWM0_CH7=TCC0_CH7,
158-
PWM1_CH0=TCC1_CH0,
159-
PWM1_CH1=TCC1_CH1,
160-
PWM1_CH2=TCC1_CH2,
161-
PWM1_CH3=TCC1_CH3,
162-
PWM2_CH0=TCC2_CH0,
163-
PWM2_CH1=TCC2_CH1,
164-
PWM2_CH2=TCC2_CH2,
165-
PWM2_CH3=TCC2_CH3,
166-
PWM3_CH0=TC3_CH0,
167-
PWM3_CH1=TC3_CH1,
168-
PWM4_CH0=TC4_CH0,
169-
PWM4_CH1=TC4_CH1,
170-
PWM5_CH0=TC5_CH0,
171-
PWM5_CH1=TC5_CH1,
172-
#if defined(__SAMD21J18A__)
173-
PWM6_CH0=TC6_CH0,
174-
PWM6_CH1=TC6_CH1,
175-
PWM7_CH0=TC7_CH0,
176-
PWM7_CH1=TC7_CH1,
177-
#endif // __SAMD21J18A__
178-
} EPWMChannel ;
179-
180-
#endif
181-
182-
183207
typedef enum _EPortType
184208
{
185209
NOT_A_PORT=-1,
@@ -255,12 +279,20 @@ typedef enum _EPioType
255279
#define PIN_ATTR_COMBO (1UL<<0)
256280
#define PIN_ATTR_ANALOG (1UL<<1)
257281
#define PIN_ATTR_DIGITAL (1UL<<2)
258-
#define PIN_ATTR_PWM (1UL<<3)
259282
#define PIN_ATTR_TIMER (1UL<<4)
260283
#define PIN_ATTR_TIMER_ALT (1UL<<5)
261284
#define PIN_ATTR_EXTINT (1UL<<6)
262285
#define PIN_ATTR_ANALOG_ALT (1UL<<7)
263286

287+
#if defined(__SAMD51__)
288+
// these correspond to the mux table
289+
#define PIN_ATTR_PWM_E (1UL<<3)
290+
#define PIN_ATTR_PWM_F (1UL<<8)
291+
#define PIN_ATTR_PWM_G (1UL<<9)
292+
#else
293+
#define PIN_ATTR_PWM (1UL<<3)
294+
#endif
295+
264296
/* Types used for the table below */
265297
typedef struct _PinDescription
266298
{

‎cores/arduino/wiring.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -79,13 +79,13 @@ void init( void )
7979
// PM->APBAMASK.reg |= PM_APBAMASK_EIC ;
8080

8181
#if defined(__SAMD51__)
82-
MCLK->APBAMASK.reg |= MCLK_APBAMASK_SERCOM0 | MCLK_APBAMASK_SERCOM1;
82+
MCLK->APBAMASK.reg |= MCLK_APBAMASK_SERCOM0 | MCLK_APBAMASK_SERCOM1 | MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1;
8383

8484
MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2 | MCLK_APBBMASK_SERCOM3 | MCLK_APBBMASK_TCC0 | MCLK_APBBMASK_TCC1 | MCLK_APBBMASK_TC3 | MCLK_APBBMASK_TC2;
8585

86-
MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2 | MCLK_APBCMASK_TC4 | MCLK_APBCMASK_TC5;
86+
MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2 | MCLK_APBCMASK_TCC3 | MCLK_APBCMASK_TC4 | MCLK_APBCMASK_TC5;
8787

88-
MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC | MCLK_APBDMASK_SERCOM4 | MCLK_APBDMASK_SERCOM5 | MCLK_APBDMASK_ADC0 | MCLK_APBDMASK_ADC1;
88+
MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC | MCLK_APBDMASK_SERCOM4 | MCLK_APBDMASK_SERCOM5 | MCLK_APBDMASK_ADC0 | MCLK_APBDMASK_ADC1 | MCLK_APBDMASK_TCC4;
8989
#else
9090
// Clock SERCOM for Serial
9191
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0 | PM_APBCMASK_SERCOM1 | PM_APBCMASK_SERCOM2 | PM_APBCMASK_SERCOM3 | PM_APBCMASK_SERCOM4 | PM_APBCMASK_SERCOM5 ;

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