ARC: Flush SCM when PTW uncached is configured

Page Table Walker (PTW) may be configured to use memory only.
It requires each page pointer to be flushed before it can be used
by hardware PTW. Since we have SCM (L2) now we need to flush it
as well.

Signed-off-by: Vladimir Isaev <isaev@synopsys.com>

Author: Vladimir Isaev

arch/arc/include/asm/cluster.h

@@ -156,5 +156,6 @@ static inline void arc_cln_write_reg(unsigned int reg, unsigned int data)
 
 void arc_cluster_mumbojumbo(void);
 void arc_cluster_scm_enable(void);
+void arc_cluster_scm_flush_range(phys_addr_t low, phys_addr_t high);
 
 #endif /* _ASM_ARC_CLUSTER_H */

arch/arc/mm/cache-arcv3.c

@@ -14,6 +14,8 @@ static struct cpuinfo_arc_cache {
 	unsigned int sz_k, line_len, colors;
 } ic, dc, l2_info;
 
+#define ARC_L2_CONFIGURED	(l2_info.sz_k && l2_enable)
+
 static int read_decode_cache_bcr_arcv3(int c, char *buf, int len)
 {
 	struct cpuinfo_arc_cache *p_l2 = &l2_info;
@@ -103,7 +105,7 @@ void __ref arc_cache_init(void)
 {
 	unsigned int __maybe_unused cpu = smp_processor_id();
 
-	if (cpu == 0 && l2_info.sz_k && l2_enable)
+	if (cpu == 0 && ARC_L2_CONFIGURED)
 		arc_cluster_scm_enable();
 }
 
@@ -284,6 +286,8 @@ void ptw_flush(void *xp)
 #else
         write_aux_reg(ARC_REG_DC_IVDL, __pa(xp));
 #endif
+	if (ARC_L2_CONFIGURED)
+		arc_cluster_scm_flush_range(__pa(xp), __pa(xp));
 #endif
 }
 

arch/arc/mm/cluster.c

@@ -40,3 +40,18 @@ void arc_cluster_scm_enable()
 
 	arc_cln_write_reg(ARC_CLN_CACHE_STATUS, ARC_CLN_CACHE_STATUS_EN);
 }
+
+void arc_cluster_scm_flush_range(phys_addr_t low, phys_addr_t high)
+{
+	arc_cln_write_reg(ARC_CLN_CACHE_ADDR_LO0, (u32) low);
+	arc_cln_write_reg(ARC_CLN_CACHE_ADDR_LO1, (u64) low >> 32);
+
+	arc_cln_write_reg(ARC_CLN_CACHE_ADDR_HI0, (u32) high);
+	arc_cln_write_reg(ARC_CLN_CACHE_ADDR_HI1, (u64) high >> 32);
+
+	arc_cln_write_reg(ARC_CLN_CACHE_CMD, ARC_CLN_CACHE_CMD_OP_ADDR_CLN);
+
+	while (arc_cln_read_reg(ARC_CLN_CACHE_STATUS) &
+	       ARC_CLN_CACHE_STATUS_BUSY)
+		;
+}