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pavelvkozlovabrodkin
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ARCv3:haps: Set core and UART clock frequency to 20MHz
All recent bitfiles are built for 20MHz core clock. Signed-off-by: Pavel Kozlov <pavel.kozlov@synopsys.com>
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arch/arc/boot/dts/haps_hs.dts

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@
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core_clk: core_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
43-
clock-frequency = <50000000>;
43+
clock-frequency = <20000000>;
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};
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core_intc: interrupt-controller {
@@ -53,7 +53,7 @@
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compatible = "ns16550a";
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reg = <0xf0000000 0x2000>;
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interrupts = <24>;
56-
clock-frequency = <50000000>;
56+
clock-frequency = <20000000>;
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baud = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;

arch/arc/boot/dts/haps_hs_idu.dts

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@
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core_clk: core_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
40-
clock-frequency = <50000000>; /* 50 MHZ */
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clock-frequency = <20000000>; /* 20 MHZ */
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};
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core_intc: interrupt-controller {
@@ -58,7 +58,7 @@
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reg = <0xf0000000 0x2000>;
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interrupt-parent = <&idu_intc>;
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interrupts = <0>;
61-
clock-frequency = <50000000>;
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clock-frequency = <20000000>;
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baud = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;

arch/arc/kernel/devtree.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
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static unsigned int __initdata arc_base_baud;
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//These two variables exist only for debugging perposes
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volatile unsigned int glb_clock_freq = 50000000;
21+
volatile unsigned int glb_clock_freq = 20000000;
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volatile unsigned int glb_uart_baud = 115200;
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unsigned int __init arc_early_base_baud(void)

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