ARC: Restore PAE40 support

Changes related to commit:

ocommit 39cac19
Author: Thomas Gleixner <tglx@linutronix.de>
Date:   Tue Nov 3 10:27:21 2020 +0100

    arc/mm/highmem: Use generic kmap atomic implementation
...

are missed from arc64 tree. Restore it.

Also introduce ARC_PADDR_BITS to use as a mask in pfn-related
macro, because for PAE case PADDR_BITS != VADDR_BITS.

Signed-off-by: Vladimir Isaev <isaev@synopsys.com>

Author: Vladimir Isaev

arch/arc/include/asm/fixmap.h

@@ -34,7 +34,7 @@ extern void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
 #else
 
 #define FIXADDR_SIZE		PGDIR_SIZE
-#define FIXMAP_ADDR(nr)		(FIXMAP_BASE + ((nr) << PAGE_SHIFT))
+#define FIXADDR_TOP             (FIXADDR_START + (FIX_KMAP_END << PAGE_SHIFT))
 
 #endif /* CONFIG_ISA_ARCV3 */
 

arch/arc/include/asm/highmem.h

@@ -12,7 +12,12 @@
 #include <asm/kmap_size.h>
 #include <asm/fixmap.h>
 
-#define KM_TYPE_NR		((FIXADDR_SIZE >> PAGE_SHIFT)/NR_CPUS)
+
+#define PKMAP_BASE	(FIXADDR_START + FIXADDR_SIZE)
+
+#define FIX_KMAP_SLOTS		(KM_MAX_IDX * NR_CPUS)
+#define FIX_KMAP_BEGIN		(0UL)
+#define FIX_KMAP_END		((FIX_KMAP_BEGIN + FIX_KMAP_SLOTS) - 1)
 
 /*
  * This should be converted to the asm-generic version, but of course this
@@ -22,7 +27,6 @@
 #define __virt_to_fix(x)	(((FIXADDR_TOP - ((x) & PAGE_MASK))) >> PAGE_SHIFT)
 
 /* start after fixmap area */
-#define PKMAP_BASE		(FIXADDR_START + FIXADDR_SIZE)
 #define PKMAP_SIZE		PGDIR_SIZE
 #define LAST_PKMAP		(PKMAP_SIZE >> PAGE_SHIFT)
 #define LAST_PKMAP_MASK		(LAST_PKMAP - 1)

arch/arc/include/asm/pgtable-levels.h

@@ -136,6 +136,18 @@
 #define ARC_VADDR_BITS		32
 #endif
 
+#if defined(CONFIG_ARC_HAS_PAE40)
+#define ARC_PADDR_BITS		40
+#elif defined(CONFIG_ARC_MMU_V6_52)
+/*
+ * FIXME: Only 48-bit phy addresses supported for MMUv52 for now.
+ * Bits 51:48 of address are mapped to 15:12 of entry.
+ */
+#define ARC_PADDR_BITS		48
+#else
+#define ARC_PADDR_BITS		ARC_VADDR_BITS
+#endif
+
 #define PGDIR_SIZE		BIT(PGDIR_SHIFT)
 #define PGDIR_MASK		(~(PGDIR_SIZE - 1))
 #define PTRS_PER_PGD		BIT(ARC_VADDR_BITS - PGDIR_SHIFT)
@@ -258,15 +270,7 @@ extern void ptw_flush(void *pxx);
 #define pte_page(pte)		pfn_to_page(pte_pfn(pte))
 #define set_pte(ptep, pte)	do { (*(ptep)) = (pte); ptw_flush(ptep); } while (0)
 
-#ifdef CONFIG_ARC_MMU_V6_52
-/*
- * FIXME: Only 48-bit phy addresses supported for MMUv52 for now.
- * Bits 51:48 of address are mapped to 15:12 of entry.
- */
-#define pte_pfn(pte)		((pte_val(pte) >> PAGE_SHIFT) & ((1UL << (48 - PAGE_SHIFT)) - 1))
-#else
-#define pte_pfn(pte)		((pte_val(pte) >> PAGE_SHIFT) & ((1UL << (ARC_VADDR_BITS - PAGE_SHIFT)) - 1))
-#endif
+#define pte_pfn(pte)		((pte_val(pte) >> PAGE_SHIFT) & ((1UL << (ARC_PADDR_BITS - PAGE_SHIFT)) - 1))
 
 #define pfn_pte(pfn, prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))
 #define mk_pte(page, prot)	pfn_pte(page_to_pfn(page), prot)

arch/arc/include/asm/processor.h

@@ -141,7 +141,8 @@ extern unsigned long __get_wchan(struct task_struct *p);
 #define VMALLOC_SIZE	((CONFIG_ARC_KVADDR_SIZE << 20) - PMD_SIZE * 4)
 #define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)
 
-#define FIXADDR_START	(PAGE_OFFSET - FIXMAP_SIZE - PKMAP_SIZE)
+#define FIXADDR_START	(PAGE_OFFSET - FIXADDR_SIZE - PKMAP_SIZE)
+#define PKMAP_BASE	(FIXADDR_START + FIXADDR_SIZE)
 
 #endif /* CONFIG_ARC_MMU_V6_* */