|
89 | 89 | ; |
90 | 90 | ; Out: |
91 | 91 | ; All registers are clobbered. |
92 | | -.macro BUILD_PAGE_TABLE, link_addr, phy_addr, link_end, pgd, pud, pmd, cur, tmp |
| 92 | +.macro BUILD_PAGE_TABLE, link_addr, phy_addr, link_end, pgd, pud, pmd, cur, tmp, val, foo |
93 | 93 |
|
94 | 94 | ; FIXME: we need asserts about kernel size <= allocated size |
95 | 95 | ; FIXME: we need a better way to generalize this |
96 | 96 | #if defined(CONFIG_ARC_MMU_V6_48) && defined(CONFIG_ARC_PAGE_SIZE_4K) |
97 | 97 |
|
98 | | -; Two-level page table, PGD + PUD |
| 98 | +; Three-level page table, PGD + PUD + PMD |
99 | 99 | #define BUILD_PGD_ENTRY BUILD_PAGE_TABLE_ENTRY \pgd, \link_addr, \pud, \cur, \tmp, PTRS_PER_PGD, PGDIR_SHIFT, PAGE_KERNEL |
100 | | -#define BUILD_PUD_ENTRY BUILD_PAGE_TABLE_ENTRY \pud, \link_addr, \phy_addr, \cur, \tmp, PTRS_PER_PUD, PUD_SHIFT, PAGE_KERNEL_BLK |
101 | | -#define BUILD_PMD_ENTRY |
102 | | -#define ENTRY_SIZE PUD_SIZE |
103 | | -#define ENTRY_LABEL .Lbuild_pud_entry\@ |
| 100 | +#define BUILD_PUD_ENTRY BUILD_PAGE_TABLE_ENTRY \pud, \link_addr, \pmd, \cur, \tmp, PTRS_PER_PUD, PUD_SHIFT, PAGE_KERNEL |
| 101 | +#define BUILD_PMD_ENTRY BUILD_PAGE_TABLE_ENTRY \pmd, \link_addr, \phy_addr, \cur, \tmp, PTRS_PER_PMD, PMD_SHIFT, PAGE_KERNEL_BLK |
| 102 | +#define ENTRY_SIZE PMD_SIZE |
| 103 | +#define ENTRY_LABEL .Lbuild_pmd_entry\@ |
| 104 | +#define NEXT_SIZE PUD_SIZE |
| 105 | +#define ENTRY_LABEL_NEXT .Lbuild_pud_entry\@ |
104 | 106 |
|
105 | 107 | #elif defined(CONFIG_ARC_MMU_V6_48) && defined(CONFIG_ARC_PAGE_SIZE_16K) |
106 | 108 |
|
|
110 | 112 | #define BUILD_PMD_ENTRY BUILD_PAGE_TABLE_ENTRY \pmd, \link_addr, \phy_addr, \cur, \tmp, PTRS_PER_PMD, PMD_SHIFT, PAGE_KERNEL_BLK |
111 | 113 | #define ENTRY_SIZE PMD_SIZE |
112 | 114 | #define ENTRY_LABEL .Lbuild_pmd_entry\@ |
| 115 | +#define NEXT_SIZE PUD_SIZE |
| 116 | +#define ENTRY_LABEL_NEXT .Lbuild_pud_entry\@ |
113 | 117 |
|
114 | 118 | #elif defined(CONFIG_ARC_MMU_V6_48) && defined(CONFIG_ARC_PAGE_SIZE_64K) || defined(CONFIG_ARC_MMU_V6_52) || defined(CONFIG_ARC_MMU_V6_32) |
115 | 119 |
|
|
119 | 123 | #define BUILD_PMD_ENTRY BUILD_PAGE_TABLE_ENTRY \pmd, \link_addr, \phy_addr, \cur, \tmp, PTRS_PER_PMD, PMD_SHIFT, PAGE_KERNEL_BLK |
120 | 124 | #define ENTRY_SIZE PMD_SIZE |
121 | 125 | #define ENTRY_LABEL .Lbuild_pmd_entry\@ |
| 126 | +#define NEXT_SIZE PGDIR_SIZE |
| 127 | +#define ENTRY_LABEL_NEXT .Lbuild_pgd_entry\@ |
122 | 128 |
|
123 | 129 | #endif |
124 | 130 |
|
| 131 | + ADDR \val, \link_addr, NEXT_SIZE |
| 132 | + MOVR \foo, \pmd |
| 133 | + |
125 | 134 | .Lbuild_pgd_entry\@: |
126 | 135 | BUILD_PGD_ENTRY |
127 | 136 |
|
|
136 | 145 | ADDR \link_addr, \link_addr, ENTRY_SIZE |
137 | 146 |
|
138 | 147 | ; All link addresses are in |
139 | | - CMPR \link_end, \link_addr |
140 | | - ble .Lbuild_end\@ |
| 148 | + CMPR \link_addr, \link_end |
| 149 | + bge .Lbuild_end\@ |
| 150 | + CMPR \link_addr, \val |
| 151 | + bge.d .Linc\@ |
| 152 | + ADDR \foo, \foo, 0x8 |
141 | 153 | b ENTRY_LABEL |
| 154 | + |
| 155 | +.Linc\@: |
| 156 | + MOVR \pmd, \foo |
| 157 | + ADDR \val, \foo, NEXT_SIZE |
| 158 | + b ENTRY_LABEL_NEXT |
| 159 | + |
142 | 160 | .Lbuild_end\@: |
143 | 161 | #undef BUILD_PGD_ENTRY |
144 | 162 | #undef BUILD_PUD_ENTRY |
145 | 163 | #undef BUILD_PMD_ENTRY |
146 | 164 | #undef ENTRY_SIZE |
147 | 165 | #undef ENTRY_LABEL |
| 166 | +#undef NEXT_SIZE |
| 167 | +#undef ENTRY_LABEL_NEXT |
148 | 168 | .endm |
149 | 169 |
|
150 | 170 | ; Create page table with 1:1 mapping in given table pointers. |
|
196 | 216 | SUBR r8, r8, r10 |
197 | 217 | ADDR r8, r8, r11 |
198 | 218 |
|
199 | | - BUILD_PAGE_TABLE r3, r4, r5, r6, r7, r8, r9, r10 |
| 219 | + BUILD_PAGE_TABLE r3, r4, r5, r6, r7, r8, r9, r10, r11, r12 |
200 | 220 | .endm |
201 | 221 |
|
202 | 222 | ; Create page table with virt to phy mapping in given addresses. |
|
212 | 232 | MOVI r3, PAGE_OFFSET |
213 | 233 | ; phy_addr <- CONFIG_LINUX_LINK_BASE |
214 | 234 | MOVI r4, CONFIG_LINUX_LINK_BASE |
215 | | - ; link_end <- EARLY_MAP_SIZE , see processor.h |
216 | | - MOVI r5, (PAGE_OFFSET + EARLY_MAP_SIZE) |
| 235 | + ; link_end <- CONFIG_LINUX_MAP_SIZE , see processor.h |
| 236 | + MOVI r5, (PAGE_OFFSET + CONFIG_LINUX_MAP_SIZE) |
217 | 237 |
|
218 | 238 | ; pgd <- __pa(tbl_pg_dir) |
219 | 239 | MOVA r6, \tbl_pg_dir |
|
230 | 250 | SUBR r8, r8, r3 |
231 | 251 | ADDR r8, r8, r4 |
232 | 252 |
|
233 | | - BUILD_PAGE_TABLE r3, r4, r5, r6, r7, r8, r9, r10 |
| 253 | + BUILD_PAGE_TABLE r3, r4, r5, r6, r7, r8, r9, r10, r11, r12 |
234 | 254 | .endm |
235 | 255 |
|
236 | 256 | ; Enable MMU and jump into virtual address space. |
|
0 commit comments