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IRISZZWIRISZZW
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board: nsim: switch to ns16550 UART model
Switch nSIM from hostlink model to ns16550 model which is available in nSIM since 2019. This will avoid the link of hostlinke library and make code maintanence simpler. Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
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+65
-52
lines changed

4 files changed

+65
-52
lines changed

‎board/nsim/configs/10/core_config.mk‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,3 +3,4 @@
33
# Select the core configuration loaded into FPGA chip
44
##
55
CUR_CORE ?= arcem
6+
ONCHIP_IP_LIST ?= designware/uart

‎board/nsim/configs/core_compiler.mk‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ ACORE_OPT_GNU += $(COMMON_CORE_OPT_GNU)
1616
LCORE_OPT_GNU += $(COMMON_CORE_OPT_GNU)
1717

1818
## Metaware Debugger and nSIM Related Options ##
19-
MDB_NSIM_OPT += @$(EMBARC_GENERATED_DIR)/$(GENE_MDB_ARG)
19+
MDB_NSIM_OPT += -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 @$(EMBARC_GENERATED_DIR)/$(GENE_MDB_ARG)
2020

21-
NSIMDRV_OPT = -propsfile $(EMBARC_GENERATED_DIR)/$(GENE_NSIM_PROPS)
21+
NSIMDRV_OPT = -p nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 -propsfile $(EMBARC_GENERATED_DIR)/$(GENE_NSIM_PROPS)
2222
endif

‎board/nsim/drivers/uart/nsim_uart_obj.c‎

Lines changed: 57 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,8 @@
2727
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2828
*
2929
--------------------------------------------- */
30-
#include <stdio.h>
30+
#include "dw_uart.h"
31+
#include "nsim_uart_obj.h"
3132
#include "arc.h"
3233
#include "arc_builtin.h"
3334
#include "embARC_toolchain.h"
@@ -39,63 +40,72 @@
3940
* NSIM UART 0 Object Instantiation
4041
*/
4142
#if (USE_NSIM_UART_0)
42-
43-
DEV_UART nsim_uart_0; /*!< nsim uart object */
44-
45-
46-
/** nsim uart 0 open */
47-
static int32_t nsim_uart_0_open(uint32_t baud)
43+
static void dw_uart_0_isr(void *ptr);
44+
#define DW_UART_0_BASE (0xf0000000) /*!< designware uart 0 relative baseaddr */
45+
#define DW_UART_0_INTNO (24) /*!< designware uart 0 interrupt number */
46+
47+
static DEV_UART dw_uart_0; /*!< designware uart object */
48+
static DW_UART_CTRL dw_uart_0_ctrl = { /*!< designware uart 0 ctrl */
49+
0, 1000000, DW_UART_0_INTNO, (INT_HANDLER)dw_uart_0_isr,
50+
1, 1, 0
51+
};
52+
53+
/** designware uart 0 open */
54+
static int32_t dw_uart_0_open(uint32_t baud)
4855
{
49-
/* no need to open, stdio is used */
50-
return 0;
56+
return dw_uart_open(&dw_uart_0, baud);
5157
}
52-
/** nsim uart 0 close */
53-
static int32_t nsim_uart_0_close (void)
58+
/** designware uart 0 close */
59+
static int32_t dw_uart_0_close(void)
5460
{
55-
return 0;
61+
return dw_uart_close(&dw_uart_0);
5662
}
57-
/** nsim uart 0 control */
58-
static int32_t nsim_uart_0_control(uint32_t ctrl_cmd, void *param)
63+
/** designware uart 0 control */
64+
static int32_t dw_uart_0_control(uint32_t ctrl_cmd, void *param)
5965
{
60-
return 0;
66+
return dw_uart_control(&dw_uart_0, ctrl_cmd, param);
6167
}
62-
/** nsim uart 0 write */
63-
static int32_t nsim_uart_0_write(const void *data, uint32_t len)
68+
/** designware uart 0 write */
69+
static int32_t dw_uart_0_write(const void *data, uint32_t len)
6470
{
65-
return fwrite(data, len, sizeof(unsigned char), stdout);
71+
return dw_uart_write(&dw_uart_0, data, len);
6672
}
67-
/** nsim uart 0 close */
68-
static int32_t nsim_uart_0_read(void *data, uint32_t len)
73+
/** designware uart 0 close */
74+
static int32_t dw_uart_0_read(void *data, uint32_t len)
6975
{
70-
unsigned int i;
71-
int c;
72-
73-
for (i = 0; i < len; i++) {
74-
c = getchar();
75-
if (c < 0) {
76-
break;
77-
}
78-
if (c == 10) {
79-
c = 13;
80-
}
81-
*((unsigned char *)data) = (unsigned char)c;
82-
data++;
83-
}
84-
85-
return i;
76+
return dw_uart_read(&dw_uart_0, data, len);
8677
}
87-
88-
/** install nsim uart 0 to system */
89-
static void nsim_uart_0_install(void)
78+
/** designware uart 0 interrupt rountine */
79+
static void dw_uart_0_isr(void *ptr)
80+
{
81+
dw_uart_isr(&dw_uart_0, ptr);
82+
}
83+
/** install designware uart 0 to system */
84+
static void dw_uart_0_install(void)
9085
{
91-
DEV_UART *nsim_uart_ptr = &nsim_uart_0;
86+
uint32_t uart_abs_base = 0;
87+
DEV_UART *dw_uart_ptr = &dw_uart_0;
88+
DEV_UART_INFO *dw_uart_info_ptr = &(dw_uart_0.uart_info);
89+
DW_UART_CTRL *dw_uart_ctrl_ptr = &dw_uart_0_ctrl;
90+
91+
/**
92+
* get absolute designware base address
93+
*/
94+
uart_abs_base = (uint32_t)DW_UART_0_BASE;
95+
dw_uart_ctrl_ptr->dw_uart_regbase = uart_abs_base;
96+
97+
/** uart info init */
98+
dw_uart_info_ptr->uart_ctrl = (void *)dw_uart_ctrl_ptr;
99+
dw_uart_info_ptr->opn_cnt = 0;
100+
dw_uart_info_ptr->status = 0;
101+
dw_uart_info_ptr->baudrate = UART_BAUDRATE_115200; /* default 115200bps */
92102

93103
/** uart dev init */
94-
nsim_uart_ptr->uart_open = nsim_uart_0_open;
95-
nsim_uart_ptr->uart_close = nsim_uart_0_close;
96-
nsim_uart_ptr->uart_control = nsim_uart_0_control;
97-
nsim_uart_ptr->uart_write = nsim_uart_0_write;
98-
nsim_uart_ptr->uart_read = nsim_uart_0_read;
104+
dw_uart_ptr->uart_open = dw_uart_0_open;
105+
dw_uart_ptr->uart_close = dw_uart_0_close;
106+
dw_uart_ptr->uart_control = dw_uart_0_control;
107+
dw_uart_ptr->uart_write = dw_uart_0_write;
108+
dw_uart_ptr->uart_read = dw_uart_0_read;
99109

100110
}
101111
#endif /* USE_DW_UART_0 */
@@ -114,7 +124,7 @@ DEV_UART_PTR uart_get_dev(int32_t uart_id)
114124
switch (uart_id) {
115125
#if (USE_NSIM_UART_0)
116126
case NSIM_UART_0_ID:
117-
return &nsim_uart_0;
127+
return &dw_uart_0;
118128
break;
119129
#endif
120130
default:
@@ -130,6 +140,6 @@ DEV_UART_PTR uart_get_dev(int32_t uart_id)
130140
void nsim_uart_all_install(void)
131141
{
132142
#if (USE_NSIM_UART_0)
133-
nsim_uart_0_install();
143+
dw_uart_0_install();
134144
#endif
135145
}

‎board/nsim/nsim.mk‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,6 @@ BD_VER ?= 10
1616
override BD_VER := $(strip $(BD_VER))
1717

1818
## Extra Hostlink Options
19-
LCORE_OPT_MW += -Hhostlink
20-
LCORE_OPT_GNU += --specs=nsim.specs
2119

2220
## Set Valid Board Version
2321
VALID_BD_VER = $(call check_item_exist, $(BD_VER), $(SUPPORTED_BD_VERS))
@@ -56,6 +54,10 @@ include $(BOARD_NSIM_DIR)/configs/core_configs.mk
5654
COMMON_COMPILE_PREREQUISITES += $(BOARD_NSIM_DIR)/configs/core_compiler.mk
5755
include $(BOARD_NSIM_DIR)/configs/core_compiler.mk
5856

57+
# onchip ip object rules
58+
ifdef ONCHIP_IP_LIST
59+
BOARD_EMSK_DEV_CSRCDIR += $(foreach ONCHIP_IP_OBJ, $(ONCHIP_IP_LIST), $(addprefix $(BOARD_EMSK_DIR)/drivers/ip/, $(ONCHIP_IP_OBJ)))
60+
endif
5961

6062
include $(EMBARC_ROOT)/device/device.mk
6163

@@ -101,7 +103,7 @@ BOARD_NSIM_OBJS = $(BOARD_NSIM_COBJS) $(BOARD_NSIM_ASMOBJS)
101103
BOARD_NSIM_DEPS = $(call get_deps, $(BOARD_NSIM_OBJS))
102104

103105
# extra macros to be defined
104-
BOARD_NSIM_DEFINES += $(CORE_DEFINES) -D_HOSTLINK_ -D_NSIM_
106+
BOARD_NSIM_DEFINES += $(CORE_DEFINES) -D_NSIM_
105107

106108
# genearte library
107109
BOARD_LIB_NSIM = $(OUT_DIR)/libboard_nsim.a

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