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‎arc_design_contest/2018/NCTU_Smart Pillow/README.md‎

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@@ -113,6 +113,11 @@ set_pmod_mux(mux_regs, PM1_UR_UART_0 | PM1_LR_SPI_S \
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```
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* dw_uart_obj.h
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* dw_uart_obj.c
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In order to calculate **CPU Loading**
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We need to modify following files
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* task.h
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* task.c
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### Run This Application
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Here take **EMSK2.2 - ARC EM7DFPU**

‎arc_design_contest/2018/NCTU_Smart Pillow/_modified/dw_uart_obj.c‎

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/* ------------------------------------------
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* Copyright (c) 2016, Synopsys, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1) Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* \version 2016.05
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* \date 2014-07-03
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* \author Huaqi Fang(Huaqi.Fang@synopsys.com)
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--------------------------------------------- */
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/**
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* \defgroup BOARD_EMSK_DRV_DW_UART_OBJ EMSK DW UART Object
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* \ingroup BOARD_EMSK_DRIVER
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* \brief EMSK Designware UART Objects
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* \details
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* Realize the EMSK board uart object using Designware uart device driver,
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* only need to realize some Designware uart structures combine with EMSK uart
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* hardware resource. just like cpp class instantiation.
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*/
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/**
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* \file
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* \ingroup BOARD_EMSK_DRV_DW_UART_OBJ
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* \brief designware uart object instantiation on emsk
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*/
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/**
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* \addtogroup BOARD_EMSK_DRV_DW_UART_OBJ
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* @{
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*/
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#include "arc.h"
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#include "arc_builtin.h"
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#include "embARC_toolchain.h"
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#include "embARC_error.h"
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#include "arc_exception.h"
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#include "dw_uart.h"
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#include "dw_uart_obj.h"
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#include "../../emsk.h"
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#define PERIPHERAL_BASE _arc_aux_read(AUX_DMP_PERIPHERAL)
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#define DW_UART_FIFO_LEN 32
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/**
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* \name EMSK DesignWare UART 0 Object Instantiation
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* @{
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*/
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#if (USE_DW_UART_0)
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static void dw_uart_0_isr(void *ptr);
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#define DW_UART_0_RELBASE (REL_REGBASE_UART0) /*!< designware uart 0 relative baseaddr */
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#define DW_UART_0_INTNO (INTNO_UART0) /*!< designware uart 0 interrupt number */
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DEV_UART dw_uart_0; /*!< designware uart object */
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DW_UART_CTRL dw_uart_0_ctrl = { /*!< designware uart 0 ctrl */
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0, CLK_BUS_APB, DW_UART_0_INTNO, (INT_HANDLER)dw_uart_0_isr,
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DW_UART_FIFO_LEN, DW_UART_FIFO_LEN, 0
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};
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/** designware uart 0 open */
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static int32_t dw_uart_0_open (uint32_t baud)
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{
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return dw_uart_open(&dw_uart_0, baud);
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}
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/** designware uart 0 close */
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static int32_t dw_uart_0_close (void)
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{
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return dw_uart_close(&dw_uart_0);
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}
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/** designware uart 0 control */
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static int32_t dw_uart_0_control (uint32_t ctrl_cmd, void *param)
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{
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return dw_uart_control(&dw_uart_0, ctrl_cmd, param);
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}
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/** designware uart 0 write */
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static int32_t dw_uart_0_write (const void *data, uint32_t len)
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{
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return dw_uart_write(&dw_uart_0, data, len);
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}
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/** designware uart 0 close */
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static int32_t dw_uart_0_read (void *data, uint32_t len)
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{
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return dw_uart_read(&dw_uart_0, data, len);
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}
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/** designware uart 0 interrupt rountine */
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static void dw_uart_0_isr(void *ptr)
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{
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dw_uart_isr(&dw_uart_0, ptr);
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}
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/** install designware uart 0 to system */
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static void dw_uart_0_install(void)
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{
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uint32_t uart_abs_base = 0;
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DEV_UART *dw_uart_ptr = &dw_uart_0;
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DEV_UART_INFO *dw_uart_info_ptr = &(dw_uart_0.uart_info);
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DW_UART_CTRL *dw_uart_ctrl_ptr = &dw_uart_0_ctrl;
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/**
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* get absolute designware base address
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*/
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uart_abs_base = (uint32_t)PERIPHERAL_BASE + DW_UART_0_RELBASE;
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dw_uart_ctrl_ptr->dw_uart_regbase = uart_abs_base;
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/** uart info init */
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dw_uart_info_ptr->uart_ctrl = (void *)dw_uart_ctrl_ptr;
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dw_uart_info_ptr->opn_cnt = 0;
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dw_uart_info_ptr->status = 0;
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dw_uart_info_ptr->baudrate = UART_BAUDRATE_115200; /* default 115200bps */
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/** uart dev init */
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dw_uart_ptr->uart_open = dw_uart_0_open;
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dw_uart_ptr->uart_close = dw_uart_0_close;
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dw_uart_ptr->uart_control = dw_uart_0_control;
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dw_uart_ptr->uart_write = dw_uart_0_write;
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dw_uart_ptr->uart_read = dw_uart_0_read;
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}
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#endif /* USE_DW_UART_0 */
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/** @} end of name */
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/**
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* \name EMSK DesignWare UART 1 Object Instantiation
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* @{
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*/
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#if (USE_DW_UART_1)
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static void dw_uart_1_isr(void *ptr);
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#define DW_UART_1_RELBASE (REL_REGBASE_UART1) /*!< designware uart 1 relative baseaddr */
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#define DW_UART_1_INTNO (INTNO_UART1) /*!< designware uart 1 interrupt number */
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DEV_UART dw_uart_1; /*!< designware uart 1 object */
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DW_UART_CTRL dw_uart_1_ctrl = { /*!< designware uart 1 ctrl */
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0, CLK_BUS_APB, DW_UART_1_INTNO, (INT_HANDLER)dw_uart_1_isr,
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DW_UART_FIFO_LEN, DW_UART_FIFO_LEN, 0
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};
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/** designware uart 1 open */
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static int32_t dw_uart_1_open (uint32_t baud)
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{
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return dw_uart_open(&dw_uart_1, baud);
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}
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/** designware uart 1 close */
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static int32_t dw_uart_1_close (void)
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{
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return dw_uart_close(&dw_uart_1);
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}
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/** designware uart 1 control */
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static int32_t dw_uart_1_control (uint32_t ctrl_cmd, void *param)
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{
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return dw_uart_control(&dw_uart_1, ctrl_cmd, param);
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}
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/** designware uart 1 write */
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static int32_t dw_uart_1_write (const void *data, uint32_t len)
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{
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return dw_uart_write(&dw_uart_1, data, len);
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}
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/** designware uart 1 close */
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static int32_t dw_uart_1_read (void *data, uint32_t len)
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{
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return dw_uart_read(&dw_uart_1, data, len);
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}
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/** designware uart 1 interrupt routine */
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static void dw_uart_1_isr(void *ptr)
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{
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dw_uart_isr(&dw_uart_1, ptr);
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}
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/** install designware uart 1 to system */
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static void dw_uart_1_install(void)
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{
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uint32_t uart_abs_base = 0;
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DEV_UART *dw_uart_ptr = &dw_uart_1;
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DEV_UART_INFO *dw_uart_info_ptr = &(dw_uart_1.uart_info);
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DW_UART_CTRL *dw_uart_ctrl_ptr = &dw_uart_1_ctrl;
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/**
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* get absolute designware base address
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*/
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uart_abs_base = (uint32_t)PERIPHERAL_BASE + DW_UART_1_RELBASE;
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dw_uart_ctrl_ptr->dw_uart_regbase = uart_abs_base;
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/** uart info init */
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dw_uart_info_ptr->uart_ctrl = (void *)dw_uart_ctrl_ptr;
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dw_uart_info_ptr->opn_cnt = 0;
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dw_uart_info_ptr->status = 0;
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dw_uart_info_ptr->baudrate = UART_BAUDRATE_115200; /* default 115200bps */
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/** uart dev init */
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dw_uart_ptr->uart_open = dw_uart_1_open;
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dw_uart_ptr->uart_close = dw_uart_1_close;
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dw_uart_ptr->uart_control = dw_uart_1_control;
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dw_uart_ptr->uart_write = dw_uart_1_write;
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dw_uart_ptr->uart_read = dw_uart_1_read;
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}
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#endif /* USE_DW_UART_1 */
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/** @} end of name */
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/**
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* \name EMSK DesignWare UART 2 Object Instantiation
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* @{
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*/
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#if (USE_DW_UART_2)
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static void dw_uart_2_isr(void *ptr);
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#define DW_UART_2_RELBASE (REL_REGBASE_UART2) /*!< designware uart 2 relative baseaddr */
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#define DW_UART_2_INTNO (INTNO_UART2) /*!< designware uart 2 interrupt number */
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DEV_UART dw_uart_2; /*!< designware uart 2 object */
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DW_UART_CTRL dw_uart_2_ctrl = { /*!< designware uart 2 ctrl */
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0, CLK_BUS_APB, DW_UART_2_INTNO, (INT_HANDLER)dw_uart_2_isr,
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DW_UART_FIFO_LEN, DW_UART_FIFO_LEN, 0
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};
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/** designware uart 2 open */
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static int32_t dw_uart_2_open (uint32_t baud)
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{
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return dw_uart_open(&dw_uart_2, baud);
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}
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/** designware uart 2 close */
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static int32_t dw_uart_2_close (void)
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{
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return dw_uart_close(&dw_uart_2);
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}
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/** designware uart 2 control */
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static int32_t dw_uart_2_control (uint32_t ctrl_cmd, void *param)
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{
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return dw_uart_control(&dw_uart_2, ctrl_cmd, param);
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}
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/** designware uart 2 write */
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static int32_t dw_uart_2_write (const void *data, uint32_t len)
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{
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return dw_uart_write(&dw_uart_2, data, len);
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}
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/** designware uart 2 close */
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static int32_t dw_uart_2_read (void *data, uint32_t len)
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{
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return dw_uart_read(&dw_uart_2, data, len);
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}
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/** designware uart 2 interrupt routine */
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static void dw_uart_2_isr(void *ptr)
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{
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dw_uart_isr(&dw_uart_2, ptr);
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}
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/** install designware uart 2 to system */
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static void dw_uart_2_install(void)
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{
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uint32_t uart_abs_base = 0;
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DEV_UART *dw_uart_ptr = &dw_uart_2;
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DEV_UART_INFO *dw_uart_info_ptr = &(dw_uart_2.uart_info);
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DW_UART_CTRL *dw_uart_ctrl_ptr = &dw_uart_2_ctrl;
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/**
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* get absolute designware base address
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*/
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uart_abs_base = (uint32_t)PERIPHERAL_BASE + DW_UART_2_RELBASE;
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dw_uart_ctrl_ptr->dw_uart_regbase = uart_abs_base;
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/** uart info init */
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dw_uart_info_ptr->uart_ctrl = (void *)dw_uart_ctrl_ptr;
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dw_uart_info_ptr->opn_cnt = 0;
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dw_uart_info_ptr->status = 0;
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dw_uart_info_ptr->baudrate = UART_BAUDRATE_115200; /* default 115200bps */
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/** uart dev init */
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dw_uart_ptr->uart_open = dw_uart_2_open;
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dw_uart_ptr->uart_close = dw_uart_2_close;
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dw_uart_ptr->uart_control = dw_uart_2_control;
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dw_uart_ptr->uart_write = dw_uart_2_write;
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dw_uart_ptr->uart_read = dw_uart_2_read;
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}
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#endif /* USE_DW_UART_2 */
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/** @} end of name */
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/** get one designware device structure */
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DEV_UART_PTR uart_get_dev(int32_t uart_id)
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{
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static uint32_t install_flag = 0;
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/* intall device objects */
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if (install_flag == 0) {
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install_flag = 1;
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dw_uart_all_install();
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}
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switch (uart_id) {
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#if (USE_DW_UART_0)
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case DW_UART_0_ID:
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return &dw_uart_0;
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break;
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#endif
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#if (USE_DW_UART_1)
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case DW_UART_1_ID:
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return &dw_uart_1;
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break;
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#endif
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#if (USE_DW_UART_2)
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case DW_UART_2_ID:
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return &dw_uart_2;
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break;
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#endif
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default:
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break;
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}
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return NULL;
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}
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/**
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* \brief install all uart objects
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* \note \b MUST be called during system init
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*/
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void dw_uart_all_install(void)
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{
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#if (USE_DW_UART_0)
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dw_uart_0_install();
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#endif
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#if (USE_DW_UART_1)
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dw_uart_1_install();
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#endif
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#if (USE_DW_UART_2)
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dw_uart_2_install();
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#endif
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}
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/** @} end of group BOARD_EMSK_DRV_DW_UART_OBJ */

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