Skip to content

Commit faca03e

Browse files
author
Nelson Chu
committed
RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions.
bfd/ * elfxx-riscv.c (riscv_parse_prefixed_ext): Removed zb*. gas/ * config/tc-riscv.c (riscv_multi_subset_supports): Removed INSN_CLASS_ZB*. * testsuite/gas/riscv/bitmanip-insns-32.d: Removed. * testsuite/gas/riscv/bitmanip-insns-64.d: Removed. * testsuite/gas/riscv/bitmanip-insns.s: Removed. include/ * opcode/riscv-opc.h: Removed macros for zb* extensions. * opcode/riscv.h (riscv_insn_class): Removed INSN_CLASS_ZB*. opcodes/ * riscv-opc.c (MASK_RVB_IMM): Removed. (riscv_opcodes): Removed zb* instructions. (riscv_ext_version_table): Removed versions for zb*.
1 parent d49885a commit faca03e

File tree

12 files changed

+28
-326
lines changed

12 files changed

+28
-326
lines changed

bfd/ChangeLog

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,7 @@
1+
2021-02-05 Nelson Chu <nelson.chu@sifive.com>
2+
3+
* elfxx-riscv.c (riscv_parse_prefixed_ext): Removed zb*.
4+
15
2021-02-04 Alan Modra <amodra@gmail.com>
26

37
PR 27311

bfd/elfxx-riscv.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1597,7 +1597,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
15971597

15981598
static const char * const riscv_std_z_ext_strtab[] =
15991599
{
1600-
"zicsr", "zifencei", "zihintpause", "zba", "zbb", "zbc", NULL
1600+
"zicsr", "zifencei", "zihintpause", NULL
16011601
};
16021602

16031603
static const char * const riscv_std_s_ext_strtab[] =

gas/ChangeLog

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,11 @@
1+
2021-02-05 Nelson Chu <nelson.chu@sifive.com>
2+
3+
* config/tc-riscv.c (riscv_multi_subset_supports): Removed
4+
INSN_CLASS_ZB*.
5+
* testsuite/gas/riscv/bitmanip-insns-32.d: Removed.
6+
* testsuite/gas/riscv/bitmanip-insns-64.d: Removed.
7+
* testsuite/gas/riscv/bitmanip-insns.s: Removed.
8+
19
2021-01-26 Alan Modra <amodra@gmail.com>
210

311
PR 27282

gas/config/tc-riscv.c

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -253,16 +253,6 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
253253
case INSN_CLASS_ZIHINTPAUSE:
254254
return riscv_subset_supports ("zihintpause");
255255

256-
case INSN_CLASS_ZBA:
257-
return riscv_subset_supports ("zba");
258-
case INSN_CLASS_ZBB:
259-
return riscv_subset_supports ("zbb");
260-
case INSN_CLASS_ZBC:
261-
return riscv_subset_supports ("zbc");
262-
case INSN_CLASS_ZBA_OR_ZBB:
263-
return (riscv_subset_supports ("zba")
264-
|| riscv_subset_supports ("zbb"));
265-
266256
default:
267257
as_fatal ("Unreachable");
268258
return FALSE;

gas/testsuite/gas/riscv/bitmanip-insns-32.d

Lines changed: 0 additions & 37 deletions
This file was deleted.

gas/testsuite/gas/riscv/bitmanip-insns-64.d

Lines changed: 0 additions & 55 deletions
This file was deleted.

gas/testsuite/gas/riscv/bitmanip-insns.s

Lines changed: 0 additions & 58 deletions
This file was deleted.

include/ChangeLog

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,8 @@
1+
2021-02-05 Nelson Chu <nelson.chu@sifive.com>
2+
3+
* opcode/riscv-opc.h: Removed macros for zb* extensions.
4+
* opcode/riscv.h (riscv_insn_class): Removed INSN_CLASS_ZB*.
5+
16
2021-01-24 Nick Clifton <nickc@redhat.com>
27

38
This is the 2.36 release.

include/opcode/riscv-opc.h

Lines changed: 0 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -191,78 +191,6 @@
191191
#define MASK_REMW 0xfe00707f
192192
#define MATCH_REMUW 0x200703b
193193
#define MASK_REMUW 0xfe00707f
194-
#define MATCH_GREVI 0x68005013
195-
#define MASK_GREVI 0xfc00707f
196-
#define MATCH_GORCI 0x28005013
197-
#define MASK_GORCI 0xfc00707f
198-
#define MATCH_PACK 0x8004033
199-
#define MASK_PACK 0xfe00707f
200-
#define MATCH_PACKW 0x800403b
201-
#define MASK_PACKW 0xfe00707f
202-
#define MATCH_SH1ADD 0x20002033
203-
#define MASK_SH1ADD 0xfe00707f
204-
#define MATCH_SH2ADD 0x20004033
205-
#define MASK_SH2ADD 0xfe00707f
206-
#define MATCH_SH3ADD 0x20006033
207-
#define MASK_SH3ADD 0xfe00707f
208-
#define MATCH_SH1ADD_UW 0x2000203b
209-
#define MASK_SH1ADD_UW 0xfe00707f
210-
#define MATCH_SH2ADD_UW 0x2000403b
211-
#define MASK_SH2ADD_UW 0xfe00707f
212-
#define MATCH_SH3ADD_UW 0x2000603b
213-
#define MASK_SH3ADD_UW 0xfe00707f
214-
#define MATCH_ADD_UW 0x800003b
215-
#define MASK_ADD_UW 0xfe00707f
216-
#define MATCH_SLLI_UW 0x800101b
217-
#define MASK_SLLI_UW 0xfc00707f
218-
#define MATCH_CLZ 0x60001013
219-
#define MASK_CLZ 0xfff0707f
220-
#define MATCH_CTZ 0x60101013
221-
#define MASK_CTZ 0xfff0707f
222-
#define MATCH_CPOP 0x60201013
223-
#define MASK_CPOP 0xfff0707f
224-
#define MATCH_MIN 0xa004033
225-
#define MASK_MIN 0xfe00707f
226-
#define MATCH_MAX 0xa006033
227-
#define MASK_MAX 0xfe00707f
228-
#define MATCH_MINU 0xa005033
229-
#define MASK_MINU 0xfe00707f
230-
#define MATCH_MAXU 0xa007033
231-
#define MASK_MAXU 0xfe00707f
232-
#define MATCH_SEXT_B 0x60401013
233-
#define MASK_SEXT_B 0xfff0707f
234-
#define MATCH_SEXT_H 0x60501013
235-
#define MASK_SEXT_H 0xfff0707f
236-
#define MATCH_ANDN 0x40007033
237-
#define MASK_ANDN 0xfe00707f
238-
#define MATCH_ORN 0x40006033
239-
#define MASK_ORN 0xfe00707f
240-
#define MATCH_XNOR 0x40004033
241-
#define MASK_XNOR 0xfe00707f
242-
#define MATCH_RORI 0x60005013
243-
#define MASK_RORI 0xfc00707f
244-
#define MATCH_ROR 0x60005033
245-
#define MASK_ROR 0xfe00707f
246-
#define MATCH_ROL 0x60001033
247-
#define MASK_ROL 0xfe00707f
248-
#define MATCH_CLZW 0x6000101b
249-
#define MASK_CLZW 0xfff0707f
250-
#define MATCH_CTZW 0x6010101b
251-
#define MASK_CTZW 0xfff0707f
252-
#define MATCH_CPOPW 0x6020101b
253-
#define MASK_CPOPW 0xfff0707f
254-
#define MATCH_RORIW 0x6000501b
255-
#define MASK_RORIW 0xfe00707f
256-
#define MATCH_RORW 0x6000503b
257-
#define MASK_RORW 0xfe00707f
258-
#define MATCH_ROLW 0x6000103b
259-
#define MASK_ROLW 0xfe00707f
260-
#define MATCH_CLMUL 0xa001033
261-
#define MASK_CLMUL 0xfe00707f
262-
#define MATCH_CLMULH 0xa003033
263-
#define MASK_CLMULH 0xfe00707f
264-
#define MATCH_CLMULR 0xa002033
265-
#define MASK_CLMULR 0xfe00707f
266194
#define MATCH_AMOADD_W 0x202f
267195
#define MASK_AMOADD_W 0xf800707f
268196
#define MATCH_AMOXOR_W 0x2000202f
@@ -1002,42 +930,6 @@ DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
1002930
DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
1003931
DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
1004932
DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
1005-
DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI)
1006-
DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI)
1007-
DECLARE_INSN(pack, MATCH_PACK, MASK_PACK)
1008-
DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW)
1009-
DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
1010-
DECLARE_INSN(sh2add, MATCH_SH2ADD, MASK_SH2ADD)
1011-
DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD)
1012-
DECLARE_INSN(sh1add_uw, MATCH_SH1ADD_UW, MASK_SH1ADD_UW)
1013-
DECLARE_INSN(sh2add_uw, MATCH_SH2ADD_UW, MASK_SH2ADD_UW)
1014-
DECLARE_INSN(sh3add_uw, MATCH_SH3ADD_UW, MASK_SH3ADD_UW)
1015-
DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW)
1016-
DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW)
1017-
DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ)
1018-
DECLARE_INSN(ctz, MATCH_CTZ, MASK_CTZ)
1019-
DECLARE_INSN(cpop, MATCH_CPOP, MASK_CPOP)
1020-
DECLARE_INSN(min, MATCH_MIN, MASK_MIN)
1021-
DECLARE_INSN(max, MATCH_MAX, MASK_MAX)
1022-
DECLARE_INSN(minu, MATCH_MINU, MASK_MINU)
1023-
DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU)
1024-
DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B)
1025-
DECLARE_INSN(sext_h, MATCH_SEXT_H, MASK_SEXT_H)
1026-
DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN)
1027-
DECLARE_INSN(orn, MATCH_ORN, MASK_ORN)
1028-
DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR)
1029-
DECLARE_INSN(rori, MATCH_RORI, MASK_RORI)
1030-
DECLARE_INSN(ror, MATCH_ROR, MASK_ROR)
1031-
DECLARE_INSN(rol, MATCH_ROL, MASK_ROL)
1032-
DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW)
1033-
DECLARE_INSN(ctzw, MATCH_CTZW, MASK_CTZW)
1034-
DECLARE_INSN(cpopw, MATCH_CPOPW, MASK_CPOPW)
1035-
DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW)
1036-
DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW)
1037-
DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW)
1038-
DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL)
1039-
DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR)
1040-
DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH)
1041933
DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
1042934
DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
1043935
DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)

include/opcode/riscv.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -312,10 +312,6 @@ enum riscv_insn_class
312312
INSN_CLASS_ZICSR,
313313
INSN_CLASS_ZIFENCEI,
314314
INSN_CLASS_ZIHINTPAUSE,
315-
INSN_CLASS_ZBA,
316-
INSN_CLASS_ZBB,
317-
INSN_CLASS_ZBC,
318-
INSN_CLASS_ZBA_OR_ZBB,
319315
};
320316

321317
/* This structure holds information for a particular instruction. */

0 commit comments

Comments
 (0)