[arc64/opcodes] Add mmu_{rtp,ctrl,ttbc} auxiliary regs

The following arc64 auxiliary registers are added:

0x460 mmu_rtp0_lo
0x461 mmu_rtp0_hi
0x462 mmu_rtp1_lo
0x463 mmu_rtp1_hi
0x468 mmu_ctrl
0x469 mmu_ttbc

Author: Shahab Vahedi

opcodes/arc-regs.h

@@ -346,11 +346,17 @@ DEF (0x451, ARC_OPCODE_ARC600,  NONE, wake)
 DEF (0x452, ARC_OPCODE_ARC600,  NONE, dvfs_performance)
 DEF (0x453, ARC_OPCODE_ARC600,  NONE, pwr_ctrl)
 DEF (0x460, ARC_OPCODE_ARCv2HS, NONE, tlbpd0)
+DEF (0x460, ARC_OPCODE_ARC64,   NONE, mmu_rtp0_lo)
 DEF (0x461, ARC_OPCODE_ARCv2HS, NONE, tlbpd1)
+DEF (0x461, ARC_OPCODE_ARC64,   NONE, mmu_rtp0_hi)
+DEF (0x462, ARC_OPCODE_ARC64,   NONE, mmu_rtp1_lo)
+DEF (0x463, ARC_OPCODE_ARC64,   NONE, mmu_rtp1_hi)
 DEF (0x464, ARC_OPCODE_ARCv2HS, NONE, tlbindex)
 DEF (0x465, ARC_OPCODE_ARCv2HS, NONE, tlbcommand)
 DEF (0x468, ARC_OPCODE_ARCv2HS, NONE, pid)
 DEF (0x46c, ARC_OPCODE_ARCv2HS, NONE, scratch_data0)
+DEF (0x468, ARC_OPCODE_ARC64,   NONE, mmu_ctrl)
+DEF (0x469, ARC_OPCODE_ARC64,   NONE, mmu_ttbc)
 DEF (0x500, ARC_OPCODE_ARC700,  NONE, aux_vlc_buf_idx)
 DEF (0x501, ARC_OPCODE_ARC700,  NONE, aux_vlc_read_buf)
 DEF (0x502, ARC_OPCODE_ARC700,  NONE, aux_vlc_valid_bits)