|
2435 | 2435 | { "breq", 0x0E017F80, 0xFF017FFF, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, LIMMdup, SIMM9_A16_8 }, { C_CC_EQ }}, |
2436 | 2436 |
|
2437 | 2437 | /* breql<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01000. */ |
2438 | | -{ "breql", 0x08010008, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
| 2438 | +{ "breql", 0x08010008, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
2439 | 2439 |
|
2440 | 2440 | /* breql<.d> b,u6,s9 00001bbbsssssss1SBBBuuuuuuN11000. */ |
2441 | | -{ "breql", 0x08010018, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
| 2441 | +{ "breql", 0x08010018, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
2442 | 2442 |
|
2443 | 2443 | /* breql b,ximm,s9 00001bbbsssssss1SBBB111100001000. */ |
2444 | | -{ "breql", 0x08010F08, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
| 2444 | +{ "breql", 0x08010F08, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
2445 | 2445 |
|
2446 | 2446 | /* breql ximm,c,s9 00001100sssssss1S111CCCCCC001000. */ |
2447 | | -{ "breql", 0x0C017008, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2447 | +{ "breql", 0x0C017008, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2448 | 2448 |
|
2449 | 2449 | /* breql ximm,u6,s9 00001100sssssss1S111uuuuuu011000. */ |
2450 | | -{ "breql", 0x0C017018, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2450 | +{ "breql", 0x0C017018, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2451 | 2451 |
|
2452 | 2452 | /* breql b,limm,s9 00001bbbsssssss1SBBB111110001000. */ |
2453 | | -{ "breql", 0x08010F88, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
| 2453 | +{ "breql", 0x08010F88, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
2454 | 2454 |
|
2455 | 2455 | /* breql limm,c,s9 00001110sssssss1S111CCCCCC001000. */ |
2456 | | -{ "breql", 0x0E017008, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2456 | +{ "breql", 0x0E017008, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2457 | 2457 |
|
2458 | 2458 | /* breql limm,u6,s9 00001110sssssss1S111uuuuuu011000. */ |
2459 | | -{ "breql", 0x0E017018, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2459 | +{ "breql", 0x0E017018, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2460 | 2460 |
|
2461 | 2461 | /* breql_s b,0,s8 11101bbb0sssssss. */ |
2462 | | -{ "breql_s", 0x0000E800, 0x0000F880, ARC_OPCODE_ARC64, ARITH, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
| 2462 | +{ "breql_s", 0x0000E800, 0x0000F880, ARC_OPCODE_ARC64, BRCC, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
2463 | 2463 |
|
2464 | 2464 | /* breq_s b,0,s8 11101bbb0sssssss. */ |
2465 | | -{ "breq_s", 0x0000E800, 0x0000F880, ARC_OPCODE_ARC32, ARITH, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
| 2465 | +{ "breq_s", 0x0000E800, 0x0000F880, ARC_OPCODE_ARC32, BRCC, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
2466 | 2466 |
|
2467 | 2467 | /* brge<.d>CC_GE b,c,s9 00001bbbsssssss1SBBBCCCCCCN00011. */ |
2468 | 2468 | { "brge", 0x08010003, 0xF801001F, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D, C_CC_GE }}, |
|
2483 | 2483 | { "brge", 0x0E017F83, 0xFF017FFF, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, LIMMdup, SIMM9_A16_8 }, { C_CC_GE }}, |
2484 | 2484 |
|
2485 | 2485 | /* brgel<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01011. */ |
2486 | | -{ "brgel", 0x0801000B, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
| 2486 | +{ "brgel", 0x0801000B, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
2487 | 2487 |
|
2488 | 2488 | /* brgel<.d> b,u6,s9 00001bbbsssssss1SBBBuuuuuuN11011. */ |
2489 | | -{ "brgel", 0x0801001B, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
| 2489 | +{ "brgel", 0x0801001B, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
2490 | 2490 |
|
2491 | 2491 | /* brgel b,ximm,s9 00001bbbsssssss1SBBB111100001011. */ |
2492 | | -{ "brgel", 0x08010F0B, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
| 2492 | +{ "brgel", 0x08010F0B, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
2493 | 2493 |
|
2494 | 2494 | /* brgel ximm,c,s9 00001100sssssss1S111CCCCCC001011. */ |
2495 | | -{ "brgel", 0x0C01700B, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2495 | +{ "brgel", 0x0C01700B, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2496 | 2496 |
|
2497 | 2497 | /* brgel ximm,u6,s9 00001100sssssss1S111uuuuuu011011. */ |
2498 | | -{ "brgel", 0x0C01701B, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2498 | +{ "brgel", 0x0C01701B, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2499 | 2499 |
|
2500 | 2500 | /* brgel b,limm,s9 00001bbbsssssss1SBBB111110001011. */ |
2501 | | -{ "brgel", 0x08010F8B, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
| 2501 | +{ "brgel", 0x08010F8B, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
2502 | 2502 |
|
2503 | 2503 | /* brgel limm,c,s9 00001110sssssss1S111CCCCCC001011. */ |
2504 | | -{ "brgel", 0x0E01700B, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2504 | +{ "brgel", 0x0E01700B, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2505 | 2505 |
|
2506 | 2506 | /* brgel limm,u6,s9 00001110sssssss1S111uuuuuu011011. */ |
2507 | | -{ "brgel", 0x0E01701B, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2507 | +{ "brgel", 0x0E01701B, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2508 | 2508 |
|
2509 | 2509 | /* brhs<.d>CC_HS b,c,s9 00001bbbsssssss1SBBBCCCCCCN00101. */ |
2510 | 2510 | { "brhs", 0x08010005, 0xF801001F, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D, C_CC_HS }}, |
|
2525 | 2525 | { "brhs", 0x0E017F85, 0xFF017FFF, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, LIMMdup, SIMM9_A16_8 }, { C_CC_HS }}, |
2526 | 2526 |
|
2527 | 2527 | /* brhsl<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01101. */ |
2528 | | -{ "brhsl", 0x0801000D, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
| 2528 | +{ "brhsl", 0x0801000D, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
2529 | 2529 |
|
2530 | 2530 | /* brhsl<.d> b,u6,s9 00001bbbsssssss1SBBBuuuuuuN11101. */ |
2531 | | -{ "brhsl", 0x0801001D, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
| 2531 | +{ "brhsl", 0x0801001D, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
2532 | 2532 |
|
2533 | 2533 | /* brhsl b,ximm,s9 00001bbbsssssss1SBBB111100001101. */ |
2534 | | -{ "brhsl", 0x08010F0D, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
| 2534 | +{ "brhsl", 0x08010F0D, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
2535 | 2535 |
|
2536 | 2536 | /* brhsl ximm,c,s9 00001100sssssss1S111CCCCCC001101. */ |
2537 | | -{ "brhsl", 0x0C01700D, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2537 | +{ "brhsl", 0x0C01700D, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2538 | 2538 |
|
2539 | 2539 | /* brhsl ximm,u6,s9 00001100sssssss1S111uuuuuu011101. */ |
2540 | | -{ "brhsl", 0x0C01701D, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2540 | +{ "brhsl", 0x0C01701D, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2541 | 2541 |
|
2542 | 2542 | /* brhsl b,limm,s9 00001bbbsssssss1SBBB111110001101. */ |
2543 | | -{ "brhsl", 0x08010F8D, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
| 2543 | +{ "brhsl", 0x08010F8D, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
2544 | 2544 |
|
2545 | 2545 | /* brhsl limm,c,s9 00001110sssssss1S111CCCCCC001101. */ |
2546 | | -{ "brhsl", 0x0E01700D, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2546 | +{ "brhsl", 0x0E01700D, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2547 | 2547 |
|
2548 | 2548 | /* brhsl limm,u6,s9 00001110sssssss1S111uuuuuu011101. */ |
2549 | | -{ "brhsl", 0x0E01701D, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2549 | +{ "brhsl", 0x0E01701D, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2550 | 2550 |
|
2551 | 2551 | /* brk 00100101011011110000000000111111. */ |
2552 | 2552 | { "brk", 0x256F003F, 0xFFFFFFFF,ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, KERNEL, NONE, { 0 }, { 0 }}, |
|
2573 | 2573 | { "brlo", 0x0E017F84, 0xFF017FFF, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, LIMMdup, SIMM9_A16_8 }, { C_CC_LO }}, |
2574 | 2574 |
|
2575 | 2575 | /* brlol<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01100. */ |
2576 | | -{ "brlol", 0x0801000C, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
| 2576 | +{ "brlol", 0x0801000C, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
2577 | 2577 |
|
2578 | 2578 | /* brlol<.d> b,u6,s9 00001bbbsssssss1SBBBuuuuuuN11100. */ |
2579 | | -{ "brlol", 0x0801001C, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
| 2579 | +{ "brlol", 0x0801001C, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
2580 | 2580 |
|
2581 | 2581 | /* brlol b,ximm,s9 00001bbbsssssss1SBBB111100001100. */ |
2582 | | -{ "brlol", 0x08010F0C, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
| 2582 | +{ "brlol", 0x08010F0C, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
2583 | 2583 |
|
2584 | 2584 | /* brlol ximm,c,s9 00001100sssssss1S111CCCCCC001100. */ |
2585 | | -{ "brlol", 0x0C01700C, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2585 | +{ "brlol", 0x0C01700C, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2586 | 2586 |
|
2587 | 2587 | /* brlol ximm,u6,s9 00001100sssssss1S111uuuuuu011100. */ |
2588 | | -{ "brlol", 0x0C01701C, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2588 | +{ "brlol", 0x0C01701C, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2589 | 2589 |
|
2590 | 2590 | /* brlol b,limm,s9 00001bbbsssssss1SBBB111110001100. */ |
2591 | | -{ "brlol", 0x08010F8C, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
| 2591 | +{ "brlol", 0x08010F8C, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
2592 | 2592 |
|
2593 | 2593 | /* brlol limm,c,s9 00001110sssssss1S111CCCCCC001100. */ |
2594 | | -{ "brlol", 0x0E01700C, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2594 | +{ "brlol", 0x0E01700C, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2595 | 2595 |
|
2596 | 2596 | /* brlol limm,u6,s9 00001110sssssss1S111uuuuuu011100. */ |
2597 | | -{ "brlol", 0x0E01701C, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2597 | +{ "brlol", 0x0E01701C, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2598 | 2598 |
|
2599 | 2599 | /* brlt<.d>CC_LT b,c,s9 00001bbbsssssss1SBBBCCCCCCN00010. */ |
2600 | 2600 | { "brlt", 0x08010002, 0xF801001F, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D, C_CC_LT }}, |
|
2615 | 2615 | { "brlt", 0x0E017F82, 0xFF017FFF, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, LIMMdup, SIMM9_A16_8 }, { C_CC_LT }}, |
2616 | 2616 |
|
2617 | 2617 | /* brltl<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01010. */ |
2618 | | -{ "brltl", 0x0801000A, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
| 2618 | +{ "brltl", 0x0801000A, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
2619 | 2619 |
|
2620 | 2620 | /* brltl<.d> b,u6,s9 00001bbbsssssss1SBBBuuuuuuN11010. */ |
2621 | | -{ "brltl", 0x0801001A, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
| 2621 | +{ "brltl", 0x0801001A, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
2622 | 2622 |
|
2623 | 2623 | /* brltl b,ximm,s9 00001bbbsssssss1SBBB111100001010. */ |
2624 | | -{ "brltl", 0x08010F0A, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
| 2624 | +{ "brltl", 0x08010F0A, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
2625 | 2625 |
|
2626 | 2626 | /* brltl ximm,c,s9 00001100sssssss1S111CCCCCC001010. */ |
2627 | | -{ "brltl", 0x0C01700A, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2627 | +{ "brltl", 0x0C01700A, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2628 | 2628 |
|
2629 | 2629 | /* brltl ximm,u6,s9 00001100sssssss1S111uuuuuu011010. */ |
2630 | | -{ "brltl", 0x0C01701A, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2630 | +{ "brltl", 0x0C01701A, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2631 | 2631 |
|
2632 | 2632 | /* brltl b,limm,s9 00001bbbsssssss1SBBB111110001010. */ |
2633 | | -{ "brltl", 0x08010F8A, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
| 2633 | +{ "brltl", 0x08010F8A, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
2634 | 2634 |
|
2635 | 2635 | /* brltl limm,c,s9 00001110sssssss1S111CCCCCC001010. */ |
2636 | | -{ "brltl", 0x0E01700A, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2636 | +{ "brltl", 0x0E01700A, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2637 | 2637 |
|
2638 | 2638 | /* brltl limm,u6,s9 00001110sssssss1S111uuuuuu011010. */ |
2639 | | -{ "brltl", 0x0E01701A, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2639 | +{ "brltl", 0x0E01701A, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2640 | 2640 |
|
2641 | 2641 | /* brne<.d>CC_NE b,c,s9 00001bbbsssssss1SBBBCCCCCCN00001. */ |
2642 | 2642 | { "brne", 0x08010001, 0xF801001F, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D, C_CC_NE }}, |
|
2657 | 2657 | { "brne", 0x0E017F81, 0xFF017FFF, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, LIMMdup, SIMM9_A16_8 }, { C_CC_NE }}, |
2658 | 2658 |
|
2659 | 2659 | /* brnel<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01001. */ |
2660 | | -{ "brnel", 0x08010009, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
| 2660 | +{ "brnel", 0x08010009, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, RC, SIMM9_A16_8 }, { C_D }}, |
2661 | 2661 |
|
2662 | 2662 | /* brnel<.d> b,u6,s9 00001bbbsssssss1SBBBUUUUUUN11001. */ |
2663 | | -{ "brnel", 0x08010019, 0xF801001F, ARC_OPCODE_ARC64, ARITH, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
| 2663 | +{ "brnel", 0x08010019, 0xF801001F, ARC_OPCODE_ARC64, BRCC, NONE, { RB, UIMM6_8, SIMM9_A16_8 }, { C_D }}, |
2664 | 2664 |
|
2665 | 2665 | /* brnel b,ximm,s9 00001bbbsssssss1SBBB111100001001. */ |
2666 | | -{ "brnel", 0x08010F09, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
| 2666 | +{ "brnel", 0x08010F09, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, XIMM, SIMM9_A16_8 }, { 0 }}, |
2667 | 2667 |
|
2668 | 2668 | /* brnel ximm,c,s9 00001100sssssss1S111CCCCCC001001. */ |
2669 | | -{ "brnel", 0x0C017009, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2669 | +{ "brnel", 0x0C017009, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2670 | 2670 |
|
2671 | 2671 | /* brnel ximm,u6,s9 00001100sssssss1S111uuuuuu011001. */ |
2672 | | -{ "brnel", 0x0C017019, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2672 | +{ "brnel", 0x0C017019, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { XIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2673 | 2673 |
|
2674 | 2674 | /* brnel b,limm,s9 00001bbbsssssss1SBBB111110001001. */ |
2675 | | -{ "brnel", 0x08010F89, 0xF8010FFF, ARC_OPCODE_ARC64, ARITH, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
| 2675 | +{ "brnel", 0x08010F89, 0xF8010FFF, ARC_OPCODE_ARC64, BRCC, NONE, { RB, LIMM, SIMM9_A16_8 }, { 0 }}, |
2676 | 2676 |
|
2677 | 2677 | /* brnel limm,c,s9 00001110sssssss1S111CCCCCC001001. */ |
2678 | | -{ "brnel", 0x0E017009, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
| 2678 | +{ "brnel", 0x0E017009, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, RC, SIMM9_A16_8 }, { 0 }}, |
2679 | 2679 |
|
2680 | 2680 | /* brnel limm,u6,s9 00001110sssssss1S111uuuuuu011001. */ |
2681 | | -{ "brnel", 0x0E017019, 0xFF01703F, ARC_OPCODE_ARC64, ARITH, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
| 2681 | +{ "brnel", 0x0E017019, 0xFF01703F, ARC_OPCODE_ARC64, BRCC, NONE, { LIMM, UIMM6_8, SIMM9_A16_8 }, { 0 }}, |
2682 | 2682 |
|
2683 | 2683 | /* brnel_s b,0,s8 11101bbb1sssssss. */ |
2684 | | -{ "brnel_s", 0x0000E880, 0x0000F880, ARC_OPCODE_ARC64, ARITH, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
| 2684 | +{ "brnel_s", 0x0000E880, 0x0000F880, ARC_OPCODE_ARC64, BRCC, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
2685 | 2685 |
|
2686 | 2686 | /* brne_s b,0,s8 11101bbb1sssssss. */ |
2687 | | -{ "brne_s", 0x0000E880, 0x0000F880, ARC_OPCODE_ARC32, ARITH, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
| 2687 | +{ "brne_s", 0x0000E880, 0x0000F880, ARC_OPCODE_ARC32, BRCC, NONE, { RB_S, ZB_S, SIMM8_A16_9_S }, { 0 }}, |
2688 | 2688 |
|
2689 | 2689 | /* bset<.f> a,b,c 00100bbb00001111FBBBCCCCCCAAAAAA. */ |
2690 | 2690 | { "bset", 0x200F0000, 0xF8FF0000,ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, LOGICAL, NONE, { RA, RB, RC }, { C_F }}, |
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